SN74ACT8994

DIGITAL BUS MONITOR

IEEE STD 1149.1 (JTAG) SCAN-CONTROLLED LOGIC/SIGNATURE ANALYZER

SCAS196E – JULY 1990 – REVISED DECEMBER 1996

9

POST OFFICE BOX 655303

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

MIN

MAX

UNIT

Any CLK (except during PSARAM instruction)†

50

fmax

TCK (except during PSARAM instruction)†

50

MHz

Any CLK or TCK (during PSARAM instruction)†

17

tPLH

Any CLK

EQO

7

18

ns

tPHL

Any CLK

EQO

7

17

ns

tPLH

Any CLK

PIO

9

22

ns

tPHL

Any CLK

PIO

9

22

ns

tPLH

Any CLK

TDO

9

20

ns

tPHL

Any CLK

TDO

8

19

ns

tPLH

Any D

EQO

5

17

ns

tPHL

Any D

EQO

4

15

ns

tPLH

TCK

↓

EQO

5

16

ns

tPHL

TCK

↓

EQO

5

15

ns

tPLH

TCK

↓

PIO

8

19

ns

tPHL

TCK

↓

PIO

8

19

ns

tPLH

TCK

↓

TDO

3

12

ns

tPHL

TCK

↓

TDO

3

11

ns

tPZH

TCK

↓

PIO

5

18

ns

tPZL

TCK

↓

PIO

5

18

ns

tPZH

TCK

↓

TDO

3

11

ns

tPZL

TCK

↓

TDO

2

10

ns

tPHZ

TCK

↓

PIO

6

16

ns

tPLZ

TCK

↓

PIO

5

15

ns

tPHZ

TCK

↓

TDO

9

16

ns

tPLZ

TCK

↓

TDO

8

15

ns

† The PSARAM instruction performs a parallel-signature analysis on the contents of RAM. This instruction is provided to allow self test of the RAM.