SFF2x5 1.25/2.5G EPON ONU Transceiver FTM-9423P-F10DC(G)

10km transmission

Preliminary Data Sheet

Dec. 5, 2007

Fiberxon Proprietary and Confidential, Do Not Copy or Distribute

Page 6 of 10

Pin Definitions

2×5 SFF planform in Figure 3 below shows the pin information of electrical interface and mounting studs.

Functions are described in Table 7 with some accompanying notes.

Figure 3 2×5 SFF Planform

Table 7 - Pin Function Definitions

Pin No.

Name

Description

Notes

1

Receiver Signal Ground

2

Receiver Power Supply

3

SD

Receiver Signal-Detected Indication

1

4

RD-

Inverted Receiver Data Output

5

RD+

Non-inverted Receiver Data Output

2

6

Transmitter Power Supply

7

Transmitter Signal Ground

8

TX_BRST

Transmitter Burst Control (LVTTL)

3

9

TD+

Transmitter Non-inverted Data Input

10

TD-

Transmitter Inverted Data Input

4

F

MS

Mounting Studs

5

Note 1: LVTTL logic output, with internal 10K

Ω pull-up resistor.

Optical Signal-Detected: High; Optical Signal Loss: Low

Note 3: A positive level enable optical signal output under burst mode.

Note 4: Compatible with LVPECL input, DC coupled internally

Note 5: The mounting studs are provided for transceiver mechanical attachment to circuit board. They may also

provide an optional connection of the transceiver to the equipment chassis ground. The holes in the circuit

board must be tied to chassis ground. It is not recommended that the mounting studs be connected to

signal ground.