SN74ALVCH16500

18-BIT UNIVERSAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES023G – JULY 1995 – REVISED MAY 2000

7

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figures 1 through 3)

VCC = 1.8 V

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

†

150

150

150

MHz

t

Pulse duration

LE high

†

3.3

3.3

3.3

ns

tw

Pulse duration

CLK high or low

†

3.3

3.3

3.3

ns

Data before CLK

↓

†

1.7

1.4

1.3

tsu

Setup time

Data before LE

↓

CLK high

†

1.1

1

1

ns

Data before LE

↓

CLK low

†

1.9

1.6

1.4

Data after CLK

↓

†

1.7

1.6

1.3

th

Hold time

Data after LE

↓

CLK high

†

2

1.8

1.5

ns

Data after LE

↓

CLK low

†

1.6

1.5

1.2

† This information was not available at the time of publication.

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figures 1 through 3)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 1.8 V

VCC = 2.5 V

± 0.2 V

VCC = 2.7 V

VCC = 3.3 V

± 0.3 V

UNIT

(INPUT)

(OUTPUT)

MIN

TYP

MIN

MAX

MIN

MAX

MIN

MAX

fmax

†

150

150

150

MHz

A or B

B or A

†

1

5.1

4.7

1

3.9

tpd

LEAB or LEBA

AorB

†

1

5.9

5.5

1

4.7

ns

CLKAB or CLKBA

A or B

†

1

6.6

6.6

1.1

5.5

ten

OEAB

B

†

1

5.7

5.4

1

4.6

ns

tdis

OEAB

B

†

1

6.1

5.7

1.5

5

ns

ten

OEBA

A

†

1

6.2

6.2

1

5.2

ns

tdis

OEBA

A

†

1

5.4

4.6

1

4.3

ns

† This information was not available at the time of publication.

PARAMETER

TEST CONDITIONS

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V

UNIT

PARAMETER

TEST CONDITIONS

TYP

TYP

TYP

UNIT

C d

Power dissipation

Outputs enabled

CL =50 pF

f=10MHz

†

40

51

pF

Cpd

capacitance

Outputs disabled

CL = 50 pF,

f = 10 MHz

†

6

6

pF

† This information was not available at the time of publication.