Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

SN74LVC823ADBLE Datenblatt(PDF) 2 Page - Texas Instruments

Teilenummer SN74LVC823ADBLE
Bauteilbeschribung  9-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS
PDF  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN74LVC823ADBLE Datenblatt(HTML) 2 Page - Texas Instruments

  SN74LVC823ADBLE Datasheet HTML 1Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 2Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 3Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 4Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 5Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 6Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 7Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 8Page - Texas Instruments SN74LVC823ADBLE Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 14 page
background image
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To Eight Other Channels
1D
1Q
CLKEN
CLK
OE
CLR
1
11
14
13
2
R
1D
C1
23
SN74LVC823A
9-BIT BUS-INTERFACE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS305I – MARCH 1993 – REVISED FEBRUARY 2005
A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. OE does not affect the internal operations of the latch. Previously
stored data can be retained or new data can be entered while the outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(EACH FLIP-FLOP)
INPUTS
OUTPUT
Q
OE
CLR
CLKEN
CLK
D
L
L
X
X
X
L
L
H
L
H
H
L
H
L
L
L
L
H
H
X
X
Q0
H
X
X
X
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com