AD9547SLASHPCBZ datasheet(19/104 Pages) AD

19 / 104 page

AD9547

Rev. 0 | Page 19 of 104

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100M

FREQUENCY OFFSET (Hz)

INTEGRATED RMS JITTER (PHASE NOISE):

5kHz TO 20MHz: 361fs (–69.0dBc)

20kHz TO 80MHz: 441fs (–67.3dBc) (EXTRAPOLATED)

Figure 7. Additive Phase Noise (Output Driver = LVPECL),

fREF = 19.44 MHz, fO = 155.52 MHz,

LBW = 1 kHz, fSYSCLK = 50 MHz, PLL On

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FREQUENCY OFFSET (Hz)

INTEGRATED RMS JITTER (PHASE NOISE):

12kHz TO 20MHz: 245fs (–65.0dBc)

20kHz TO 80MHz: 300fs (–64.3dBc)

Figure 8. Additive Phase Noise (Output Driver = LVPECL),

fREF = 19.44 MHz, fO = 155.52 MHz,

LBW = 1 kHz, fSYSCLK = 50 MHz (Crystal), PLL On with

2× Frequency Multiplier, ICP = 375 μA, LF = External (350 kHz)

ROHDE & SCHWARZ

SMA100 (1GHz)

ROHDE & SCHWARZ

SMA100 (50MHz)

20MHz OCXO

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FREQUENCY OFFSET (Hz)

Figure 9. Phase Noise of SYSCLK Input Sources

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FREQUENCY OFFSET (Hz)

ROHDE & SCHWARZ

SMA100 (1GHz)

ROHDE & SCHWARZ

SMA100 (50MHz)

50MHz CRYSTAL

Figure 10. Additive Phase Noise Comparison of SYSCLK Input Options

(Output Driver = LVPECL),

fREF = 19.44 MHz, fO = 311.04 MHz, LBW = 1 kHz

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FREQUENCY OFFSET (Hz)

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INTEGRATED RMS JITTER (PHASE NOISE):

5kHz TO 20MHz: 336fs (–69.7dBc)

20kHz TO 80MHz: 425fs (–67.6dBc)

Figure 11. Additive Phase Noise (Output Driver = LVPECL),

fREF = 8 kHz, fO = 155.52 MHz,

LBW = 100 Hz, fSYSCLK = 50 MHz (Crystal), PLL On

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FREQUENCY OFFSET (Hz)

CLOSED-LOOP PEAKING: 0.04dB

Figure 12. Jitter Transfer Bandwidth, Output Driver = LVPECL,

fREF = 19.44 MHz, fO = 155.52 MHz,

LBW = 100 Hz (Phase Margin = 88°), fSYSCLK = 1 GHz, PLL Off

AD9547/PCBZ Datenblatt(PDF) 19 Page - Analog Devices

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