SD16730

Characteristics

Symbol

Test conditions

Min.

Typ.

Max.

Unit

CLK－ OUTn , LATCH = “H”,

ENABLE =“L”

-

170

340

nS

LATCH－ OUTn , ENABLE =“L”

-

170

340

nS

ENABLE － OUTn , LATCH =“H”

-

170

340

nS

Propagation Delay Time (“H”

to “L”)

CLK－SERIAL OUT

4

7

-

nS

Output Rise Time

-

40

85

150

nS

Output Fall Time

-

40

70

150

nS

Maximum CLOCK Rise Time

-

-

-

5

uS

Maximum CLOCK Fall Time

-

-

-

5

uS

PIN CONFIGURATION

1

16

2

15

3

14

HANGZHOU SILAN MICROELECTRONICS CO.,LTD

REV:1.1

2008.11.16

Http://www.silan.com.cn

Page 4 of 12

4

5

6

7

8

13

12

11

10

9

GND

SERIAL-IN

CLOCK

LATCH

OUT0

OUT1

OUT2

OUT3

R-EXT

SERIAL-OUT

ENABLE

OUT7

OUT6

OUT5

OUT4

PIN DESCRIPTIONS

Pin No.

Pin Name

I/O

Description

1

GND

--

Ground terminal

2

SERIAL-IN

I

Input terminal of a data shift register

3

CLOCK

I

Input terminal of a clock shift register

4

LATCH

I

Input terminal of a data strobe

5 ~ 12

7

OUT

~

OUT0

O

Output terminals

13

ENABLE

I

Input terminal of output enable (low active)

14

SERIAL-OUT

O

output terminal of a data shift register

15

R-EXT

I

Input terminal of an external resistor

16

--

Supply voltage terminal

FUNCTION DESCRIPTION

In LED display application, SD16730 can maintain the current nearly no variations among different channels or

chips. The maximum current variation range is ±3% between channels and ±6% between chips.

This device has only one ground pin shared by signal, output sink current, and power ground. It is advisable to

pattern the ground layout with minimized inductance so that the switching noise induced by the input signals and

the output sink current would not cause chip malfunction. To prevent drivers’ outputs from damaging by