Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

ST7263BEx Datenblatt(PDF) 76 Page - STMicroelectronics

Teilenummer ST7263BEx
Bauteilbeschribung  Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C
PDF  186 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7263BEx Datenblatt(HTML) 76 Page - STMicroelectronics

Back Button ST7263BEx Datasheet HTML 72Page - STMicroelectronics ST7263BEx Datasheet HTML 73Page - STMicroelectronics ST7263BEx Datasheet HTML 74Page - STMicroelectronics ST7263BEx Datasheet HTML 75Page - STMicroelectronics ST7263BEx Datasheet HTML 76Page - STMicroelectronics ST7263BEx Datasheet HTML 77Page - STMicroelectronics ST7263BEx Datasheet HTML 78Page - STMicroelectronics ST7263BEx Datasheet HTML 79Page - STMicroelectronics ST7263BEx Datasheet HTML 80Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 76 / 186 page
background image
On-chip peripherals
ST7263Bxx
76/186
Doc ID 7516 Rev 8
Input Capture 1 High register (IC1HR)
Reset value: Undefined
This is an 8-bit read only register that contains the high part of the counter value (transferred
by the input capture 1 event).
Input Capture 1 Low register (IC1LR)
Reset value: Undefined
This is an 8-bit read only register that contains the low part of the counter value (transferred
by the input capture 1 event).
Output Compare 1 High register (OC1HR)
Reset value: 1000 0000 (80h)
This is an 8-bit register that contains the high part of the value to be compared to the CHR
register.
Output Compare 1 Low register (OC1LR)
Reset value: 0000 0000 (00h)
This is an 8-bit register that contains the low part of the value to be compared to the CLR
register.
3 OCF2 output Compare Flag 2.
0: No match (reset value).
1: The content of the free running counter has matched the content of the OC2R
register. To clear this bit, first read the SR register, then read or write the low byte of
the OC2R (OC2LR) register.
2 TIMD Timer disable.
This bit is set and cleared by software. When set, it freezes the timer prescaler and
counter and disabled the output functions (OCMP1 and OCMP2 pins) to reduce
power consumption. Access to the timer registers is still available, allowing the
timer configuration to be changed, or the counter reset, while it is disabled.
0: Timer enabled
1: Timer prescaler, counter and outputs disabled
[1:0] Reserved, must be kept cleared.
7
0
MSB
LSB
Read only
7
0
MSB
LSB
Read only
7
0
MSB
LSB
Read/write



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com