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STM32F101ZD Datenblatt(PDF) 61 Page - STMicroelectronics

Teilenummer STM32F101ZD
Bauteilbeschribung  High-density access line, ARM-based 32-bit MCU with 256 to 512 KB Flash, 9 timers, 1 ADC and 10 communication interfaces
PDF  106 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101ZD Datenblatt(HTML) 61 Page - STMicroelectronics

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STM32F101xC, STM32F101xD, STM32F101xE
Electrical characteristics
Doc ID 14610 Rev 7
61/106
Synchronous waveforms and timings
Figure 25 through Figure 28 represent synchronous waveforms and Table 36 through
Table 38 provide the corresponding timings. The results shown in these tables are obtained
with the following FSMC configuration:
●
BurstAccessMode = FSMC_BurstAccessMode_Enable;
●
MemoryType = FSMC_MemoryType_CRAM;
●
WriteBurst = FSMC_WriteBurst_Enable;
●
CLKDivision = 1; (0 is not supported, see the STM32F10xxx reference manual)
●
DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
Figure 25.
Synchronous multiplexed NOR/PSRAM read timings
FSMC_CLK
FSMC_NEx
FSMC_NADV
FSMC_A[25:16]
FSMC_NOE
FSMC_AD[15:0]
AD[15:0]
D1
D2
FSMC_NWAIT
(WAITCFG = 1b, WAITPOL + 0b)
FSMC_NWAIT
(WAITCFG = 0b, WAITPOL + 0b)
tw(CLK)
tw(CLK)
Data latency = 1
BUSTURN = 0
td(CLKL-NExL)
td(CLKH-NExH)
td(CLKL-NADVL)
td(CLKL-AV)
td(CLKL-NADVH)
td(CLKH-AIV)
td(CLKL-NOEL)
td(CLKH-NOEH)
td(CLKL-ADV)
td(CLKL-ADIV)
tsu(ADV-CLKH)
th(CLKH-ADV)
tsu(ADV-CLKH)
th(CLKH-ADV)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
tsu(NWAITV-CLKH)
th(CLKH-NWAITV)
ai14893e



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