USB4640 datasheet(51/64 Pages) SMSC

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High Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller

Datasheet

SMSC USB4640/USB4640i

Revision 1.0 (06-09-09)

DATASHEET

8.4.6.1

Implementation Characteristics

The device will only access an EEPROM using the sequential read protocol.

8.4.6.2

Pull-Up Resistor

The circuit board designer is required to place external pull-up resistors (10 k

Ω recommended) on the

SPI_DO / GPIO5 / SDA / SPI_SPD_SEL and SPI_CLK / GPIO4 / SCL lines (per SMBus 1.0

Specification and EEPROM manufacturer guidelines) to VDD33 in order to assure proper operation.

8.4.7

In-Circuit EEPROM Programming

The EEPROM can be programmed via automatic test equipment (ATE). Pulling nRESET low tri-states

the device’s EEPROM interface and allows an external source to program the EEPROM.

8.5

Default Configuration Option

The SMSC device can be configured via its internal default configuration. Please see Section 8.3.2,

"EEPROM Data Descriptor" for specific details on how to enable default configuration. Please refer to

Table 8.1 for the internal default values that are loaded when this option is selected.

8.6

Reset

There are three different resets that the device experiences. One is a hardware reset from the internal

power-on reset (POR) circuit, another reset is via the nRESET pin, and the third is a USB bus reset.

8.6.1

Internal POR Hardware Reset

All reset timing parameters are guaranteed by design.

8.6.2

External Hardware nRESET

A valid hardware reset is defined as assertion of nRESET for a minimum of 1

μs after all power

supplies are within operating range. While reset is asserted, the device (and its associated external

circuitry) consumes less than 500

μA of current.

Assertion of nRESET (external pin) causes the following:

1. All downstream ports are disabled and PRTCTL power to downstream devices is removed.

2. The PHYs are disabled and the differential pairs will be in a high-impedance state.

3. All transactions immediately terminate; no states are saved.

4. All internal registers return to the default state (in most cases, 00h).

5. The external crystal oscillator is halted.

6. The PLL is halted.

USB4640 Datenblatt(PDF) 51 Page - SMSC Corporation

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