ATmega128 datasheet(45/386 Pages) ATMEL

45 / 386 page

2467S–AVR–07/09

ATmega128

Power

Management

and Sleep

Modes

Sleep modes enable the application to shut down unused modules in the MCU, thereby saving

power. The AVR provides various sleep modes allowing the user to tailor the power consump-

tion to the application’s requirements.

To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a

SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register

select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or

Extended Standby) will be activated by the SLEEP instruction. See Table 17 for a summary. If

an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is

then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and

resumes execution from the instruction following SLEEP. The contents of the register file and

SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,

the MCU wakes up and executes from the Reset Vector.

Figure 18 on page 36 presents the different clock systems in the ATmega128, and their distribu-

tion. The figure is helpful in selecting an appropriate sleep mode.

MCU Control Register

– MCUCR

The MCU Control Register contains control bits for power management.

• Bit 5 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the Sleep mode when the

SLEEP instruction is executed. To avoid the MCU entering the Sleep mode unless it is the pro-

grammers purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the

execution of the SLEEP instruction and to clear it immediately after waking up.

• Bits 4..2 – SM2..0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the six available sleep modes as shown in Table 17.

Note:

1. Standby mode and Extended Standby mode are only available with external crystals or

resonators.

Bit

765

4321

SRE

SRW10

SM1

SM0

SM2

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

000

0000

Table 17. Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

000

Idle

ADC Noise Reduction

010

Power-down

011

Power-save

100

Reserved

101

Reserved

110

Standby(1)

Extended Standby(1)

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