ATmega1284P datasheet(7/468 Pages) ATMEL

7 / 468 page

8152G–AVR–11/09

ATmega164PA/324PA/644PA/1284P

2.3

Pin Descriptions

2.3.1

VCC

Digital supply voltage.

2.3.2

GND

Ground.

2.3.3

Port A (PA7:PA0)

Port A serves as analog inputs to the Analog-to-digital Converter.

Port A also serves as an 8-bit bi-directional I/O port with internal pull-up resistors (selected for

each bit). The Port A output buffers have symmetrical drive characteristics with both high sink

and source capability. As inputs, Port A pins that are externally pulled low will source current if

the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes

active, even if the clock is not running.

Por t

also

se rve s

the

fun c tion s

va riou s

sp ecial

fe atu r e s

th e

ATmega164PA/324PA/644PA/1284P as listed on page 82.

2.3.4

Port B (PB7:PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Por t

also

se rve s

the

fun c tion s

va riou s

sp ecial

fe atu r e s

th e

ATmega164PA/324PA/644PA/1284P as listed on page 84.

2.3.5

Port C (PC7:PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port C output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port C also serves the functions of the JTAG interface, along with special features of the

ATmega164PA/324PA/644PA/1284P as listed on page 87.

2.3.6

Port D (PD7:PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Po rt

al so

ser v e s

t h e

f u nct i o n s

o f

va ri ou s

sp eci a l

f e at u r e s

t h e

ATmega164PA/324PA/644PA/1284P as listed on page 89.

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