The copyright belongs to PVI. Any unauthorized use is prohibited.

ED097OC1

The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,

reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.

PAGE:8

-

The maximum power and maximum currents are specified for the worse case power consumption.

This occurs when 2 horizontal inverted stripped images are displayed

-

The typical power is the consumed power when “typical images” are displayed.

-

The standby power is the consumed power when the panel controller is in standby mode.

-

The listed electrical/optical characteristics are only guaranteed under the controller & waveform

provided by PVI

-

Vcom is recommended to be set in the range of assigned value

0.1V

6-4 )Panel AC characteristics

VDD=3.0V to 3.6V, unless otherwise specified.

Parameter

Symbol

Min.

Typ.

Max.

Unit

App Pin

Clock frequency

fckv

-

-

200

kHz

Minimum “L” clock pulse

width

twL

0.5

-

-

us

Clock rise time

trckv

-

-

100

ns

Clock fall time

tfckv

-

-

100

ns

CKV

Data setup time

tSU

100

-

-

ns

Data hold time

tH

100

-

-

ns

CKV,

SPV

Pulse rise time

trspv

-

-

100

ns

Pulse fall time

tfspv

-

-

100

ns

SPV

Clock

CL

cycle time

tcy

50

-

DC

ns

D0 .. D7, SPH

setup time

tsu

8

-

-

ns

D0 .. D7, SPH

hold time

th

1

-

-

ns

LE

on

delay time

tLEdly

40

-

-

ns

LE

high-level pulse width

tLEw

40

-

-

ns

LE

off

delay time

tLEoff

40

-

-

ns

Below

table

CLOCK & DATA TIMING

LE

CL

tLE

tLEdly

tLEoff

tO U T

OU T1 ~ OU T400

OUTPUT LATCH CONTROL SIGNALS

P-511-534(V:2), DO-2009-047_2, Issue date :2009/02/04

Ver:002

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