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ST8024 Datenblatt(PDF) 19 Page - Sitronix Technology Co., Ltd.

Teilenummer ST8024
Bauteilbeschribung  COM/SEG LCD Driver
PDF  28 Pages
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Hersteller  SITRONIX [Sitronix Technology Co., Ltd.]
Direct Link  http://www.sitronix.com.tw
Logo SITRONIX - Sitronix Technology Co., Ltd.

ST8024 Datenblatt(HTML) 19 Page - Sitronix Technology Co., Ltd.

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ST8024
Ver 2.1
Page 19/28
2009/08/19
(Segment Mode 3) (LGND=VSS =GND = 0V, VDD = +2.5 ~ +3.0V, V0 = + 15.0 ~ +30.0V, TOPR = -25 to+85 °C)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
NOTE
Shift clock period
tWCK
tR,tF
10ns
82
ns
1
Shift clock "H" pulse width
tWCKH
28
ns
Shift clock "L” pulse width
tWCKL
28
ns
Data setup time
tDS
20
ns
Data hold time
tDH
23
ns
Latch pulse "H" pulse width
tWLPH
30
ns
Shift clock rise to latch pulse rise time
tLD
0
ns
Shift clock fall to latch pulse fall time
tSL
65
ns
Latch pulse rise to shift clock rise time
tLS
30
ns
Latch pulse fall to shift clock fall time
tLH
30
ns
Enable setup time
tS
15
ns
Input signal rise time
tR
50
ns
2
Input signal fall time
tF
50
ns
2
/DISPOFF removal time
tSD
100
ns
/DISPOFF "L" pulse width
tWDL
1.2
µs
Output delay time (1)
tD
CL = 15 pF
57
ns
Output delay time (2)
tPD1, tPD2
CL = 15 pF
1.2
µs
Output delay time (3)
tPD3
CL = 15 pF
1.2
µs
NOTES:
1. Takes the cascade connection into consideration.
2. (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation.
(Common Mode)
(LGND=VSS = 0 V, VDD = +2.5 ~ +5.5V, V0 = +15.0 ~ +30.0V, TOPR = -25 to +85° C)
PARAMETER
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Shift clock period
tWLP
tR,tF
20ns
250
ns
VDD = +5.0± 0.5V
15
ns
Shift clock "H" pulse width
tWLPH
VDD = +2.5+ 4.5V
30
ns
Data setup time
tSU
30
ns
Data hold time
tH
50
ns
Input signal rise time
tR
50
ns
Input signal fall time
tF
50
ns
/DISPOFF removal time
tSD
100
ns
/DISPOFF "L" pulse width
tWDL
1.2
µs
Output delay time (1)
tDL
CL = 15 pF
200
ns
Output delay time (2)
tPD1, t PD2
CL = 15 pF
1.2
µs
Output delay time (3)
t PD3
CL = 15 pF
1.2
µs



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