AS5030 8-bit Programmable Magnetic Rotary Encoder

Rev. 1.8

www.austriamicrosystems.com

Page 22 of 33

The differentiator between Low Power Mode and Ultra Low Power Mode is the current consumption and the wake-up time to

switch back to active operation.

In both Reduced Power Modes, the AS5030 is inactive. The last state, e.g. the angle, AGC value, etc. is frozen and the chip

starts from this frozen state when it resumes active operation. This method provides much faster start-up than a “cold start”

from zero. If the AS5030 is cycled between active and reduced current mode, a substantial reduction of the average supply

current can be achieved. The minimum dwelling time in active mode is the wake-up time. The actual active time depends on how

much the magnet has moved while the AS5030 was in reduced power mode. The angle data is valid, when the status bit LOCK

has been set (see 5.2.1). Once a valid angle has been measured, the AS5030 can be put back to reduced power mode. The

average power consumption can be calculated as:

off

on

off

down

power

on

active

avg

t

t

t

I

t

I

I

+

∗

+

∗

=

_

where:

average current consumption

current consumption in active mode

current consumption in reduced power mode

time period during which the chip is operated in active mode

time period during which the chip is in reduced power mode

Example: Ultra Low Power Mode; sampling period = one measurement every 10ms.

A

ms

s

ms

A

s

mA

I

avg

μ

μ

μ

μ

729

5

,

9

500

5

,

9

*

30

500

14

=

+

+

∗

=

see Figure 27 for an overview table of the average current consumption in the various reduced power modes.

Reducing Power Supply Peak Currents

An optional RC-filter (R1/C1) may be added to avoid peak currents in the power supply line when the AS5030 is toggled

between active and reduced power mode. R1 must be chosen such that it can maintain a VDD voltage of 4.5V ~ 5.5V under all

conditions, especially during long active periods when the charge on C1 has expired. C1 should be chosen such that it can

support peak currents during the active operation period. For long active periods, C1 should be large and R1 should be small.

8.2

Power Cycling Mode

The power cycling method shown in Figure 26

cycles the AS5030 by switching it on and off, using

an external PNP transistor high side switch.

This mode provides the least power consumption of

all three modes; when the sampling interval is more

than 400ms, as the current consumption in off-

mode is zero.

It also has the longest start-up time of all modes,

as the chip must always perform a “cold start“ from

zero, which takes about 1.9 ms (see 8.1).

The optional filter R1/C1 may again be added to

reduce peak currents in the 5V power supply line.

Figure 26: Application example III: ultra-low power encoder

Figure 27 shows an overview of the average supply

currents in the three reduced power modes, depending on the sampling interval. The graphs shows that the Low Power Mode is

the best option for sampling intervals <4ms, while the Ultra Low Power Mode is the best option for sampling intervals between

Mode

Current

Consumption

(typ.)

Wake-up Time to Active

Operation

Active operation

14 mA

1.0 ms (without AGC)

3.8 ms(with locked AGC)

Low Power Mode

1.4 mA

0.15 ms

Ultra Low Power Mode

30 µA

0.5 ms

Micro

Controller

+5V

VDD

VSS

VSS

VDD

10k

on/off

C1

>1µF

R1

ton

toff

AS5030

100n

CS

CLK

DIO

VSS

VDD

S

N

C1 C2

0