WM2331

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 1.4 April 2001

14

AVDD

AIN

REFSENSE

REFTF

REFBF

+FS

-FS

REFTS

REFBS

MODE

DC SOURCE =

VM + [(FS+) - (FS-)]* GAIN/2

DC SOURCE =

VM - [(FS+) - (FS-)]* GAIN/2

0.1µF

10µF

0.1µF

0.1µF

Figure 14 Top/Bottom Mode (Reference Generator Disabled)

ON-CHIP REFERENCE VOLTAGE GENERATOR

The On-chip Reference Generator (ORG) can provide a reference voltage on the VREF pin that is

independent of temperature and supply voltage. External connections to the REFSENSE pin control

the ORG’s output to VREF, as shown in Table 2.

REFSENSE CONNECTION

ORG OUTPUT TO VREF

VREF pin

1 Volt

AGND

2 Volts

External divider junction

AVDD

None (VREF becomes input pin)

Table 2 Controlling the On-chip Reference Generator

Connecting REFSENSE to AVDD powers the ORG down, saving power when the ORG function is

not required.

In differential mode (MODE = AVDD/2), the voltage on VREF determines the ADC reference voltages

as follows:

2

REF

V

AVDD

REFTF

+

=

2

REF

V

AVDD

REFBF

−

=

REF

V

REFBF

REFTF

=

−

When the ORG is enabled, the VREF pin should be decoupled to the circuit board’s analogue ground

plane close to the WM2331 AGND pin via a 1

µF tantalum capacitor and a 0.1µF ceramic capacitor.

The ORG can source currents up to 1mA into external grounded loads when it is not used by the

WM2331. Typical buffer load regulation is about 0.5

Ω.