74HC_HCT164_4

© NXP B.V. 2010. All rights reserved.

Product data sheet

Rev. 04 — 2 February 2010

10 of 20

NXP Semiconductors

74HC164; 74HCT164

8-bit serial-in, parallel-out shift register

(1) Measurement points are given in Table 8.

Fig 8.

Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation

delays and the master reset to clock (CP) removal time

001aac427

MR input

CP input

Qn output

GND

GND

(1) Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable output performance.

Fig 9.

Waveforms showing the data set-up and hold times for Dn inputs

001aac428

GND

GND

Qn output

CP input

Dn input