74HC_HCT164_4

© NXP B.V. 2010. All rights reserved.

Product data sheet

Rev. 04 — 2 February 2010

4 of 20

NXP Semiconductors

74HC164; 74HCT164

8-bit serial-in, parallel-out shift register

5.2 Pin description

6.

Functional description

[1]

H = HIGH voltage level

h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition

L = LOW voltage level

I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition

q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition

↑ = LOW-to-HIGH clock transition

7.

Limiting values

Table 2.

Pin description

Symbol

Pin

Description

DSA

1

data input

DSB

2

data input

Q0 to Q7

3, 4, 5, 6, 10, 11, 12, 13

output

GND

7

ground (0 V)

CP

8

clock input (LOW-to-HIGH, edge-triggered)

MR

9

master reset input (active LOW)

14

positive supply voltage

Table 3.

Function table[1]

Operating

modes

Input

Output

MR

CP

DSA

DSB

Q0

Q1 to Q7

Reset (clear)

L

X

X

X

L

L to L

Shift

H

↑

l

l

L

q0 to q6

H

↑

l

h

L

q0 to q6

H

↑

h

l

L

q0 to q6

H

↑

h

h

H

q0 to q6

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

−0.5

+7

V

input clamping current

[1] -

±20

mA

output clamping current

[1] -

±20

mA

output current

−0.5 V < V

-

±25

mA

supply current

-

50

mA

ground current

−50

-

mA

storage temperature

−65

+150

°C