SC418 datasheet(21/30 Pages) SEMTECH

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SC418

Applications Information (continued)

It is not recommended to use the switch-over feature for

an output voltage of 3.3V or less since this does not

provide sufficient voltage for the gate-source drive to the

internal p-channel switch-over MOSFET.

It is not recommended to use the switch-over feature in

cases where the device is powered from 3.3V which is ini-

tially derived from the LDO. If the switch-over was used,

then the 3.3V switcher output would pass through the

switch-over MOSFET to power the VDDA/VDDP pins. The

RDS

(ON) of the switch-over device, typically 2.2 ohms at

3.3V, will cause a voltage drop across the device. The

VDDA/VDDP pins would be typically 200mV or more

below the 3.3V rail, due to the IR drop caused by the

VDDA/VDDP current. If this voltage drop becomes large

enough, the VDDA voltage will drop near the VDDA UVLO

threshold, causing the device to shutdown.

Switch-over MOSFET Parasitic Diodes

The switch-over MOSFET contains parasitic diodes that

are inherent to its construction, as shown in Figure 13.

Switchover

MOSFET

Parasitic diode

VDDA

VLDO

VOUT

Switchover

control

Figure 13— Switch-over MOSFET Parasitic Diodes

It is important to prevent forward bias of these diodes.

The following two conditions must be satisfied in order for

the parasitic diodes to stay off.

VDDA > V

LDO

VDDA > V

OUT

If either V

LDO or VOUT is higher than VDDA, then the respec-

tive diode will turn on and the SC418 operating current

will then flow through this diode. This has the potential of

damaging the device.

Note that if the VDDA supply is 3.3V then both the LDO

and switching regulator outputs are limited to 3.3V

maximum. Trying to obtain higher voltages such as 5V

•

will forward-bias one of the parasitic diodes and could

damage the device.

Using the Internal LDO to Bias the SC418

The following steps must be followed when using the

internal LDO to bias the device.

Connect VDDA and VDDP to VLDO before

enabling the LDO.

Any external load on VLDO should not exceed

40mA until the LDO voltage has reached 90% of

final value.

When the switch-over feature is used and the VDDA/VDDP

power comes from V

OUT, the EN and ENL inputs must be

used carefully. Do not connect the EN pin directly to VDDA

or another supply voltage. If this is done, driving the ENL

pin low (to AGND) will turn off the LDO and the LDO

switch-over MOSFET, but the switcher will continue oper-

ating. V

OUT will feed into the LDO output and the VDDA/

VDDP supplies through the internal parasitic diode. This

can potentially damage the device, and also prevents the

switcher from shutting off until the VDDA supply drops

below the VDDA UVLO threshold. For these applications a

dedicated logic signal is required to drive EN low and

disable the switcher. This signal can be combined with

the ENL signal if needed.

Design Procedure

When designing a switch mode supply the input voltage

range, load current, switching frequency, and inductor

ripple current must be specified.

The maximum input voltage (V

INMAX) is the highest speci-

fied input voltage. The minimum input voltage ( V

INMIN) is

determined by the lowest input voltage after evaluating

the voltage drops due to connectors, fuses, switches, and

PCB traces.

The following parameters define the design.

Nominal output voltage (V

OUT)

Static or DC output tolerance

Transient response

Maximum load current (I

OUT)

There are two values of load current to evaluate — con-

tinuous load current and peak load current. Continuous

•

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