Preliminary
8-39
RF3404
Rev A1 010918
8
Pin
Function
Description
Interface Schematic
24
FM IF+
FM IF output. Open collector. “Current combiner” IF interface to SAW
filter recommended.
25
FM IF-
FM IF output. Open collector. “Current combiner” IF interface to SAW
filter recommended.
See pin 24.
26
DIVIDER
ENABLE
Logic input. High enable frequency divide by 2 circuitry in cellular
mode.
27
LO IN
LO single-end input. Internal DC block.
28
GND
Low-inductance ground required.
29
ENABLE
Logic input. Low level shuts down IC. IC can be shut down by setting
pins 44 and 45 high and TX Buffer Enable low as well.
30
TX BUFFER
ENABLE
Logic input. High enables TX LO buffer amplifiers.
31
LNA GAIN
Logic input. Controls LNA bypass switch. High selects maximum LNA
gain.
32
GND
Low-inductance ground required.
33
GND
Low-inductance ground required.
34
GND
Low-inductance ground required.
35
GND
Low-inductance ground required.
36
GND
Low-inductance ground required.
37
GND
Low-inductance ground required.
38
GND
Low-inductance ground required.
39
GND
Low-inductance ground required.
40
GND
Low-inductance ground required.
41
GND
Low-inductance ground required.
42
GND
Low-inductance ground required.
43
VCC4
VCC connection for internal references, logic, and mix preamps. Inter-
nal RF bypass capacitor. External bypass capacitor between 1nF and
47nF may be required.
44
BAND SEL
Logic input. High level selects PCS band; lower level selects cellular
band.
45
IF SEL
Logic input. High selects FM IF outputs in cellular mode; low selects
CDMA IF outputs.
FM+
FM-
LO IN
ENABLE
TX BUF
LNA GAIN
BAND SEL
IF SEL
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