SC2677BEVB-2 datasheet(9/19 Pages) SEMTECH

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POWER MANAGEMENT

SC2677B

Designing for minimum trace length is not the only factor

for best design, often a optimum layout can be achieved

by keeping the wide trace and using proper layer stacking

to minimize the stray inductance.

It is important to keep the gate traces short, the IC must

be close to the power switches. It is recommended to use

at least 25 mil width or wider trace when. A good place-

ment can help if the controller is placed in the middle of

the two PWM channels.

Grounding requirements are always important in a buck

converter layout, especially at high power. Power ground

(PGND) should be returned to the bottom MOSFET source

to provide the best gate current return path. Analog ground

(AGND) should be used for the anaglog returns such as

chip decoupling, frequency setiing, reference voltage (or

soft starting cap), and the compensation.

This AGND shape should be single point connected to the

PGND shape near the ground side of the output capacitors.

This will provide noise free analog ground for operation

stablity, and also provide best possible remote sensing for

the feedback voltage.

In case two output rails need to be regulated, the AGND

shape should single point connected to the geometric cen-

ter of the PGND for the two point of loads. The single

ponit tie is a must to prevent the power current from flow-

ing on the AGND shape, so that the analog circuitry in the

controller has an electrically quiet reference and to pro-

vide the greatest noise free operation. Keep in mind that

the AGND pin is never allowed to have bigger than 1V

voltage difference vs the PGND pin. This usually achiev-

able by using a ground plane for PGND in PCB layout.

Using ground plane for PGND can reduce the physical sepa-

ration between the two grounds, such that even the fast

current transitions in the PGND plane can not generate

voltage spikes exceeding the 1V level, therefore prevent-

ing unstable and erratic behavior from happening.

The feedback divider must be close to the IC and be re-

turned to analog ground. Current sense traces must be

run parallel and close to each other and to analog ground.

Application Information(Cont.)

The IC must have a ceramic decoupling capacitor across

its supply pins, mounted as close to the device as possible.

The small ceramic, noise-filtering capacitors on the cur-

rent sense lines should also be placed as close to the IC as

possible.

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