74AHC_AHCT594_2

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 02 — 9 June 2008

13 of 22

NXP Semiconductors

74AHC594; 74AHCT594

8-bit shift register with output register

Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable output performance.

Fig 11. Shift register clock to data input set-up and hold times

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Q

7 output

SH

CP input

D

S input

Measurement points are given in Table 8.

Fig 12. Storage register reset pulse width, input to output propagation delay and recovery time

mbc325

STCP input

Q

n outputs

STR input