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L6730 Datenblatt(PDF) 28 Page - STMicroelectronics |
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L6730 Datenblatt(HTML) 28 Page - STMicroelectronics |
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28 / 52 page ![]() Device description L6730 - L6730B 28/52 Doc ID 11938 Rev 3 Table 7 shows how to set the different options through an external resistor divider: 5.11 Synchronization The presence of many converters on the same board can generate beating frequency noise. To avoid this it is important to make them operate at the same switching frequency. Moreover, a phase shift between different modules helps to minimize the RMS current on the common input capacitors. Figure 24 shows the results of two modules in synchronization. Two or more devices can be synchronized simply connecting together the SYNCH pins. The device with the higher switching frequency will be the Master while the other one will be the slave. The slave controller will increase its switching frequency reducing the ramp amplitude proportionally and then the modulator gain will be increased. To avoid a huge variation of the modulator gain, the best way to synchronize two or more devices is to make them work at the same switching frequency and, in any case, the switching frequencies can differ for a maximum of 50% of the lowest one. If, during synchronization between two (or more) L6730, it’s important to know in advance which the master is, it’s timely to set its switching frequency at least 15% higher than the slave. Using an external clock signal (fEXT) to synchronize one or more devices that are working at a different switching frequency (fSW) it is recommended to follow the below formula: Figure 23. External resistor Table 7. S/O/U and CC/O/U pin R1 R2 VSOU/VCCDR UVLO OVP SINK CC N.C 0 Ω 0 5V BUS Not latched Not 11K Ω 2.7K Ω 0.2 5V BUS Not latched Yes 6.2K Ω 2.7K Ω 0.3 5V BUS Latched Not 4.3K Ω 2.7K Ω 0.4 5V BUS Latched Yes 2.7K Ω 2.7K Ω 0.5 12V BUS Not latched Not 1.8K Ω 2.7K Ω 0.6 12V BUS Not latched Yes 1.2K Ω 2.7K Ω 0.7 12V BUS Latched Not 0 Ω N.C 1 12V BUS Latched Yes R1 R2 L6730/B S/O/U CC/O/U VCCDR SW EXT SW f f f ⋅ ≤ ≤ 3 , 1 |
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