| Datenblatt-Suchmaschine für elektronische Bauteile |
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R8C Datenblatt(PDF) 83 Page - Renesas Technology Corp |
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R8C Datenblatt(HTML) 83 Page - Renesas Technology Corp |
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83 / 106 page ![]() R01DS0011EJ0100 Rev.1.00 Page 83 of 102 Dec 21, 2010 R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group 5. Electrical Characteristics Notes: 1. The voltage detection level varies with detection targets. Select the level with the VCA24 bit in the VCA2 register. 2. Time until the voltage monitor 2 interrupt request is generated after the voltage passes Vdet2. 3. Necessary time until the voltage detection circuit operates after setting to 1 again after setting the VCA27 bit in the VCA2 register to 0. Note: 1. To use the power-on reset function, enable voltage monitor 0 reset by setting the LVDAS bit in the OFS register to 0. Figure 5.14 Power-on Reset Circuit Characteristics Table 5.40 Voltage Detection 2 Circuit Characteristics (VCC = 1.8 to 5.5 V and Topr = −20 to 85°C (N version)/ −40 to 85°C (D version), unless otherwise specified.) Symbol Parameter Condition Standard Unit Min. Typ. Max. Vdet2 Voltage detection level Vdet2_0 (1) At the falling of VCC 3.70 4.0 4.30 V – Hysteresis width at the rising of Vcc in voltage detection 2 circuit –0.10– V – Voltage detection 2 circuit response time (2) In operation At the falling of Vcc from 5 V to (Vdet2_0 − 0.1) V – 20 150 µs In stop mode At the falling of Vcc from 5 V to (Vdet2_0 − 0.1) V – 200 500 µs – Voltage detection circuit self power consumption VCA27 = 1, VCC = 5.0 V – 1.7 – µA td(E-A) Waiting time until voltage detection circuit operation starts (3) – – 100 µs Table 5.41 Power-on Reset Circuit Characteristics (1) (Topr = −20 to 85°C (N version)/ −40 to 85°C (D version), unless otherwise specified.) Symbol Parameter Condition Standard Unit Min. Typ. Max. trth External power VCC rise gradient 0 – 50000 mV/msec Notes: 1. Vdet0 indicates the voltage detection level of the voltage detection 0 circuit. Refer to 6. Voltage Detection Circuit in the User’s Manual: Hardware for details. 2. tw(por) indicates the duration the external power VCC must be held below the valid voltage (0.5 V) to enable a power-on reset. When turning on the power after it falls with voltage monitor 0 reset disabled, maintain tw(por) for 1 ms or more. Vdet0 (1) 0.5 V Internal reset signal tw(por) (2) Voltage detection 0 circuit response time Vdet0 (1) 1 fOCO-S × 32 1 fOCO-S × 32 External Power VCC trth trth |
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