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DS21434J-page 5

TC54

3.0

DETAILED DESCRIPTION

In normal steady-state operation when VIN >VDET –,

the output will be at a logic-high (see Figure 3-1). In the

case of the TC54VN, this is an open-drain condition. If

the input falls below VDET –, the output will pull down

(Logic 0) to VSS. Generally, VOUT can pull down to

within 0.5V of VSS at rated output current and input

voltage.

(See

Section 1.0

“Electrical

Characteristics”).

The output (VOUT) will stay valid until the input voltage

falls below the minimum operating voltage (VINMIN) of

0.7V. Below this minimum operating voltage, the output

is undefined. During power-up (or anytime VIN has

fallen below VINMIN), VOUT will remain undefined until

VIN rises above VINMIN. When this occurs, the output

will become valid. VOUT will be in its Active-low state,

while VINMIN <VIN <VDET+ (therefore, VDET+ = VDET –

+ VHYST). If the input rises above VDET+, the output will

assume its Inactive state (high for TC54VC, open-drain

for TC54VN).

FIGURE 3-1:

Timing Diagram.

VIN

Detect Voltage VDET –

Minimum Operating

Voltage

VHYST

VDET +

Output Voltage

Release Voltage

or RESET Voltage

Ground Level

VOUT

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