LPC1850 datasheet(5/142 Pages) NXP

Teilenummer	LPC1850

Bauteilbeschribung	32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller

PDF	142 Pages

Scroll/Zoom	100%

Hersteller	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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5 / 142 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 2.2 — 9 September 2011

5 of 142

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

Block diagram

(1) Not available on all parts (see Table 2).

Fig 1.

LPC1850/30/20/10 block diagram

ARM

CORTEX-M3

TEST/DEBUG

INTERFACE

SWD/TRACE PORT/JTAG

GPDMA

ETHERNET(1)

10/100

MAC

IEEE 1588

USB1(1)

HOST/

DEVICE

HIGH-

SPEED

USB0(1)

HOST/

DEVICE/

OTG

LCD(1)

SD/

MMC

EMC

HIGH-SPEED PHY

16/32 kB AHB SRAM

16 kB +

16 kB AHB SRAM(1)

SPIFI

AES

HS GPIO

SCT

64 kB ROM

AHB MULTILAYER MATRIX

LPC1850/30/20/10

64/96 kB LOCAL SRAM

40 kB LOCAL SRAM

002aaf218

slaves

masters

WWDT

USART0

UART1

SSP0

I2C0

C_CAN1

I2S0

I2S1

MOTOR

CONTROL

PWM(1)

TIMER3

TIMER2

USART2

USART3

SSP1

RI TIMER

QEI(1)

GIMA

BRIDGE 0

BRIDGE 1

BRIDGE 2

BRIDGE 3

BRIDGE

10-bit ADC0

10-bit ADC1

C_CAN0

I2C1

10-bit DAC

BRIDGE

RGU

CCU2

CGU

CCU1

ALARM TIMER

CONFIGURATION

REGISTERS

OTP MEMORY

EVENT ROUTER

POWER MODE CONTROL

12 MHz IRC

RTC POWER DOMAIN

BACKUP REGISTERS

RTC OSC

RTC

slaves

= connected to GPDMA

TIMER0

TIMER1

SCU

GPIO

interrupts

GPIO GROUP0

interrupt

GPIO GROUP1

interrupt

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