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Reference Operation

Internal Reference

I

OUTFS +

32

I

REF +

32

V

REF

R

SET

(9)

External Reference

Gain Setting Option

Sleep Mode

DAC5672-EP

SGLS339A – JUNE 2006 – REVISED OCTOBER 2006

APPLICATION INFORMATION (continued)

The DAC5672 has an on-chip reference circuit which comprises a 1.2-V bandgap reference and two control

Using the internal reference, a 2-k

Ω resistor value results in a full-scale output of approximately 20 mA.

Resistors with a tolerance of 1% or better should be considered. Selecting higher values, the output current can

be adjusted from 20 mA down to 2 mA. Operating the DAC5672 at lower than 20-mA output currents may be

desirable for reasons of reducing the total power consumption, improving the distortion performance, or

observing the output compliance voltage limitations for a given load condition.

It is recommended to bypass the EXTIO pin with a ceramic chip capacitor of 0.1

  F or more. The control

amplifier is internally compensated and its small signal bandwidth is approximately 300 kHz.

The internal reference can be disabled by simply applying an external reference voltage into the EXTIO pin that,

in this case, functions as an input. The use of an external reference may be considered for applications that

require higher accuracy and drift performance or to add the ability of dynamic gain control.

While a 0.1-

  F capacitor is recommended to be used with the internal reference, it is optional for the external

reference operation. The reference input, EXTIO, has a high input impedance (1 M

Ω) and can easily be driven

by various sources. Note that the voltage range of the external reference must stay within the compliance range

of the reference input.

The full-scale output current on the DAC5672 can be set two ways — either for each of the two DAC channels

independently or for both channels simultaneously. For the independent gain set mode, the GSET pin (pin 42)

connected to the BIASJ_A pin (pin 44) and the other to the BIASJ_B pin (pin 41). In this configuration, the user

has the flexibility to set and adjust the full-scale output current for each DAC independently, allowing for the

compensation of possible gain mismatches elsewhere within the transmit signal path.

Alternatively, bringing the GSET pin high (that is, connected to AVDD), the DAC5672 switches into the

simultaneous gain set mode. Now the full-scale output current of both DAC channels is determined by only one

however, this is not required since this pin is not functional in this mode and the resistor has no effect on the

gain equation.

The DAC5672 features a power-down function that can reduce the total supply current to approximately 3.1 mA

over the specified supply range if no clock is present. Applying a logic high to the SLEEP pin initiates the

power-down mode, while a logic low enables normal operation. When left unconnected, an internal active

pulldown circuit enables the normal operation of the converter.

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