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SL74HC367N Datenblatt(PDF) 4 Page - System Logic Semiconductor

Teilenummer SL74HC367N
Bauteilbeschribung  Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections
PDF  5 Pages
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Hersteller  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL74HC367N Datenblatt(HTML) 4 Page - System Logic Semiconductor

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SL74HC367
System Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS(C
L=50pF,Input t r=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to
-55
°C
≤85°C
≤125°C
Unit
TPLH, tPHL
Maximum Propagation Delay, Input A to
Output Y (Figures 1 and 3)
2.0
4.5
6.0
120
24
20
150
30
26
180
36
31
ns
TPLZ, tPHZ
Maximum Propagation Delay ,Output Enable to
Output Y (Figures 2 and 4)
2.0
4.5
6.0
175
35
30
220
44
37
265
53
46
ns
TPZL, tPZH
Maximum Propagation Delay ,Output Enable to
Output Y (Figures 2 and 4)
2.0
4.5
6.0
190
38
32
240
48
41
285
57
48
ns
TTLH, tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
CIN
Maximum Input Capacitance
-
10
10
10
pF
COUT
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
-
15
15
15
pF
Power Dissipation Capacitance (Per Buffer)
Typical @25
°C,V
CC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC
2f+I
CCVCC
40
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms



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