SL74HC74D datasheet(4/5 Pages) SLS

4 / 5 page

SL74HC74

System Logic

Semiconductor

SLS

AC ELECTRICAL CHARACTERISTICS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C

-55

°C

≤85°C

≤125°C

Unit

fmax

Maximum Clock Frequency (50% Duty Cycle)

(Figures 1 and 4)

2.0

4.5

6.0

4.8

4.0

MHz

tPLH, tPHL

Maximum Propagation Delay, Clock to Q or Q

(Figures 1 and 4)

2.0

4.5

6.0

100

125

150

tPLH, tPHL

Maximum Propagation Delay, Set or Reset to Q

or Q (Figures 2 and 4)

2.0

4.5

6.0

105

130

160

tTLH, tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 4)

2.0

4.5

6.0

110

CIN

Maximum Input Capacitance

Power Dissipation Capacitance (Per Flip-Flop)

Typical @25

°C,V

CC=5.0 V

CPD

Used to determine the no-load dynamic power

consumption:

PD=CPDVCC

2f+I

CCVCC

TIMING REQUIREMENTS(C

L=50pF,Input t r=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

°C to-55°C

≤85°C

≤125°C

Unit

tsu

Minimum Setup Time, Data to Clock

(Figure 3)

2.0

4.5

6.0

100

120

Minimum Hold Time, Clock to Data

(Figure 3)

2.0

4.5

6.0

3.0

trec

Minimum Recovery Time, Set or Reset

Inactive to Clock (Figure 2)

2.0

4.5

6.0

8.0

Minimum Pulse Width, Clock (Figure

2.0

4.5

6.0

Minimum Pulse Width, Set or Reset

(Figure 2)

2.0

4.5

6.0

tr, tf

Maximum Input Rise and Fall Times

(Figure 1)

2.0

4.5

6.0

1000

500

400

1000

500

400

1000

500

400

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