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ST7590 Datenblatt(PDF) 17 Page - STMicroelectronics |
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ST7590 Datenblatt(HTML) 17 Page - STMicroelectronics |
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17 / 24 page ![]() ST7590 Analog front end (AFE) Doc ID 18349 Rev 1 17/24 Figure 7. Power supply internal scheme 4.8 Clock management The main clock source is an 8 MHz crystal connected to the internal oscillator through XIN and XOUT pins. Both XIN and XOUT pins have a 32 pF integrated capacitor, in order to drive a crystal having a load capacitance of 16 pF with no additional components. Alternatively, an 8 MHz external clock can be directly supplied to XIN pin, leaving XOUT floating. A PLL internally connected to the output of the oscillator generates the internal clocks needed by the digital part. LDO VCC VSS VCCA VSSA LDO VDDIO GND VDD VSSA VDD_PLL 8-18V External Supply 3.3 or 5V External Supply POWER AMPLIFIER AFE DIGITAL INTERFACES DIGITAL CORE INTERNAL PLL |
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