– 8 –

CXK5V81000ATM

Address

OE

Data valid

High impedance

CE1

WE

Data out

Data in

(

∗3)

CE2

∗1 Write is executed when both CE1 and WE are at low and CE2 is at high simultaneously.

∗2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition.

the end of the write cycle.

• Write cycle (3) : CE2 control