STW82103B datasheet(18/67 Pages) STMICROELECTRONICS

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Electrical characteristics

STW82103B

18/67

Doc ID 018517 Rev 2

2 x LO output buffer (test purpose only)

FOUT

Frequency range

4.4

5.1

GHz

POUT

Output level

dBm

Return Loss

Matched to 50 ohm

I2LOBUF

Current Consumption

(pin 15, 16, 17)

LO output buffer

FOUT

Frequency range

2.2

GHz

POUT

Output level

dBm

Return Loss

Matched to 50ohm

ILOBUF

Current Consumption

(pin 15, 16, 17)

External VCO (LO) buffer

fINVCO

Frequency range

2.2

GHz

Input level

dBm

IEXTBUF

Current Consumption

External VCO Buffer

(pin 4)

-25

PLL miscellaneous

IPLL

PLL Current Consumption

Input Buffer, Prescaler,

Digital Dividers, misc.

(pin 24)

-8

IPRE

Prescaler input buffer Current

Consumption

(pin 12)

ICP

Charge Pump Current Consumption

CPSEL=[111], REXT_CP

= 4.7 k

Ω (pin 21)

-4

tLOCK

Lock up time(5)

25 kHz PLL bandwidth;

within 1ppm of frequency

error

-150

µs

The frequency step is related to the PFD input frequency as follows: FSTEP=FPFD/2)

See relationship between ICP and REXT_CP in the Circuit Description section (Charge Pump)

The level of spurs may change depending on PFD frequency, Charge Pump current, selected channel and PLL loop BW.

When setting a specified output frequency, the VCO calibration procedure must be run first in order to select the best

subrange for the VCO covering the desired frequency. Once programmed at the initial temperature T

0 inside the operating

temperature range (-40

° C to +85 ° C), the synthesizer is able to maintain the lock status if the temperature drift (in either

direction) is within the limit specified by

ΔT

LK, provided that the final temperature T1 is still inside the nominal range.

Frequency jump form 2450 to 2300 MHz; it includes the time required by the VCO calibration procedure (7 x FPFD cycles

=17.5 µs with FPFD =400 kHz))

Table 8.

Integer-N synthesizer electrical characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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