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TSA7887 Datenblatt(PDF) 3 Page - Touchstone Semiconductor Inc

Teilenummer TSA7887
Bauteilbeschribung  A Micropower, 2-channel, 125-ksps, Serial-Output 12-bit SAR ADC
PDF  20 Pages
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Hersteller  TOUCHSTONE [Touchstone Semiconductor Inc]
Direct Link  http://www.touchstonesemi.com
Logo TOUCHSTONE - Touchstone Semiconductor Inc

TSA7887 Datenblatt(HTML) 3 Page - Touchstone Semiconductor Inc

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TSA7887
TSA7887DS r1p0
Page 3
RTFDS
ELECTRICAL CHARACTERISTICS
VDD = +2.7V to +5.25V; VREF = 2.5V External/Internal Reference unless otherwise noted; fSCLK = 2 MHz;
TA = TMIN to TMAX, unless otherwise noted.
Parameter
A Version
1
B Version
1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio (SNR)
2
71
71
dB (typ)
fIN = 10 kHz sine wave, fSAMPLE = 125 ksps
Total Harmonic Distortion (THD)
−80
−80
dB (typ)
fIN = 10 kHz sine wave, fSAMPLE = 125 ksps
Peak Harmonic or Spurious Noise
–80
−80
db (typ)
fIN = 10 kHz sine wave, fSAMPLE = 125 ksps
Intermodulation Distortion (IMD)
Second-Order Terms
−80
−80
dB (typ)
f1 = 9.983 kHz, f2 = 10.05 kHz, fSAMPLE = 125 ksps
Third-Order Terms
−80
−80
dB (typ)
f1 = 9.983 kHz, f2 = 10.05 kHz, fSAMPLE = 125 ksps
Channel-to-Channel Isolation
−80
−80
dB (typ)
fIN = 25 kHz
Full-Power Bandwidth
2.5
2.5
MHz (typ)
Measured at 3 dB down
DC ACCURACY(Any channel)
Resolution
12
12
Bits
Integral Nonlinearity
±2
±1
LSB (max)
Differential Nonlinearity
±2
±1
LSB (max)
Guaranteed no missing codes to 11 bits (A Grade)
Offset Error
±3
±3
LSB (max)
VDD = 5V, dual-channel mode
±4
±4
LSB (max)
VDD = 3V, dual-channel mode
±6
±6
LSB (typ)
Single-channel mode
Offset Error Match
0.5
0.5
LSB (max)
Gain Error
±2
±2
LSB (typ)
Dual-channel mode
±1
±1
LSB (max)
Single-channel mode, external reference
±6
±6
LSB (typ)
Single-channel mode, internal reference
Gain Error Match
2
2
LSB (max)
ANALOG INPUT
Input Voltage Ranges
0 to VREF
0 to VREF
V
Leakage Current
±5
±5
μA (max)
Input Capacitance
10
10
pF (typ)
REFERENCE INPUT/OUTPUT
REFIN Input Voltage Range
2.5/VDD
2.5/VDD
V (min/max)
Functional from 1.2V
Input Impedance
10
10
kΩ (typ)
Very high impedance if internal reference disabled
REFOUT Output Voltage
2.45/2.55
2.45/2.55
V (min/max)
REFOUT Temperature Coefficient
±50
±50
ppm/°C (typ)
LOGIC INPUTS
Input High Voltage, VINH
2.4
2.4
V (min)
VDD = 4.75V to 5.25V
2.1
2.1
V (min)
VDD = 2.7V to 3.6V
Input Low Voltage, VINL
0.8
0.8
V (max)
VDD = 2.7 V to 5.25 V
Input Current, IIN
±1
±1
μA (max)
Typically 10 nA, VIN = 0 V or VDD
Input Capacitance, CIN
3
10
10
pF (max)
LOGIC OUTPUTS
Output High Voltage, VOH
ISOURCE = 200 μA
VDD − 0.5
VDD − 0.5
V (min)
VDD = 2.7V to 5.25V
Output Low Voltage, VOL
0.4
0.4
V (max)
ISINK = 200 μA
Floating-State Leakage Current
±1
±1
μA (max)
Floating-State Output Capacitance
4
10
10
pF (max)
Output Coding
Straight (Natural) Binary
CONVERSION RATE
Throughput Time
16
16
SCLK cycles
Conversion time plus acquisition time is 125 ksps,
with 2 MHz Clock
Track-and-Hold Acquisition Time
1.5
1.5
SCLK cycles
Conversion Time
14.5
14.5
SCLK cycles
7.25 μs (2 MHz Clock)



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