AD7722

–5–

REV. 0

ZERO FOR LAST 16 SCO CYCLES

VALID DATA FOR 16 SCO CYCLES

VALID

CLKIN

SCO

(CFMT = 0)

FSO

(SFMT = 0)

SCO

32 SCO CYCLES

64 CKLIN CYCLES

Figure 2a. Generalized Serial Mode Timing (FSI = Logic Low or High, TSI = DOE)

ZERO FOR LAST 16 SCO CYCLES

VALID DATA FOR 16 SCO CYCLES

VALID

CLKIN

SCO

(CFMT = 0)

FSO

(SFMT = 1)

SCO

HIGH FOR LAST 16 SCO CYCLES

LOW FOR 16 SCO CYCLES

64 CKLIN CYCLES

32 SCO CYCLES

Figure 2b. Generalized Serial Mode Timing (FSI = Logic Low or High, TSI = DOE)

0.8V

2.3V

t

9

CLKIN

FSI

SCO

Figure 3. Serial Mode Timing for Clock Input, Frame Sync Input and Serial Clock Output

CLKIN

LOW FOR

D15–D0

D15

D14

D13

D1

D0

D15

D14

D13

D1

D0

FSI

SCO

FSO

SDO

SCO

FSO

SDO

SFMT = LOGIC

LOW(0)

SFMT = LOGIC

HIGH(1)

Figure 4. Serial Mode Timing for Frame Sync Input, Frame Sync Output, Serial Clock Output

and Serial Data Output (CFMT = Logic Low, TSI = DOE)