ADM1485 datasheet(2/8 Pages) AD

2 / 8 page

REV. A

–2–

ADM1485–SPECIFICATIONS (V

CC = +5 V

5%. All specifications TMIN to TMAX unless otherwise noted.)

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

DRIVER

Differential Output Voltage, VOD

5.0

R =

∞, Figure 1

2.0

5.0

VCC = 5 V, R = 50

Ω (RS-422), Figure 1

1.5

5.0

R = 27

Ω (RS-485), Figure 1

VOD3

1.5

5.0

VTST = –7 V to +12 V, Figure 2

∆|VOD| for Complementary Output States

0.2

R = 27

Ω or 50 Ω, Figure 1

Common-Mode Output Voltage VOC

R = 27

Ω or 50 Ω, Figure 1

∆|V

OD| for Complementary Output States

0.2

R = 27

Ω or 50 Ω

Output Short Circuit Current (VOUT = High)

250

–7 V

≤ VO ≤ +12 V

Output Short Circuit Current (VOUT = Low)

250

–7 V

≤ VO ≤ +12 V

CMOS Input Logic Threshold Low, VINL

0.8

CMOS Input Logic Threshold High, VINH

2.0

Logic Input Current (DE, DI)

±1.0

µA

RECEIVER

Differential Input Threshold Voltage, VTH

–0.2

+0.2

–7 V

≤ VCM ≤ +12 V

Input Voltage Hysteresis,

∆V

VCM = 0 V

Input Resistance

Ω

–7 V

≤ VCM ≤ +12 V

Input Current (A, B)

+ 1

VIN = 12 V

–0.8

VIN = –7 V

Logic Enable Input Current (

RE)

±1

µA

CMOS Output Voltage Low, VOL

0.4

IOUT = +4.0 mA

CMOS Output Voltage High, VOH

4.0

IOUT = –4.0 mA

Short Circuit Output Current

VOUT = GND or VCC

Tristate Output Leakage Current

±1.0

µA

0.4 V

≤ VOUT ≤ +2.4 V

POWER SUPPLY CURRENT

ICC (Outputs Enabled)

1.35

2.2

Outputs Unloaded, Digital Inputs = GND or VCC

ICC (Outputs Disabled)

0.7

Outputs Unloaded, Digital Inputs = GND or VCC

Specifications subject to change without notice.

TIMING SPECIFICATIONS

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

DRIVER

Propagation Delay Input to Output TPLH, TPHL

21015

RL Diff = 54

Ω CL1 = CL2 = 100 pF, Figure 3

Driver O/P to

O/P T

SKEW

RL Diff = 54

Ω C

L1 = CL2 = 100 pF, Figure 3

Driver Rise/Fall Time TR, TF

210

RL Diff = 54

Ω CL1 = CL2 = 100 pF, Figure 3

Driver Enable to Output Valid

Driver Disable Timing

RECEIVER

Propagation Delay Input to Output TPLH, TPHL

CL = 15 pF, Figure 5

Skew |TPLH–TPHL|0

Receiver Enable TEN1

Figure 6

Receiver Disable TEN2

Figure 6

Specifications subject to change without notice.

(VCC = +5 V

5%. All specifications TMIN to TMAX unless otherwise noted.)

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