OP467GS datasheet(4/16 Pages) AD

4 / 16 page

OP467

REV. C

–4–

WAFER TEST LIMITS1

Parameter

Symbol

Conditions

Limit

Units

Offset Voltage

VOS

±0.5

mV max

Input Bias Current

VCM = 0 V

600

nA max

Input Offset Current

IOS

VCM = 0 V

100

nA max

Input Voltage Range

±12

V min/max

Common-Mode Rejection Ratio

CMRR

VCM =

±12 V

dB min

Power Supply Rejection Ratio

PSRR

V =

±4.5 V to ±18 V

dB min

Large Signal Voltage Gain

AVO

RL = 2 k

Ω

dB min

Output Voltage Range

RL = 2 k

Ω±13.0

V min

Supply Current

ISY

VO = 0 V, RL = ∞

mA max

NOTES

1Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard

product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.

2Guaranteed by CMR test.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±18 V

Input Voltage

2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±18 V

Differential Input Voltage

. . . . . . . . . . . . . . . . . . . . . .

±26 V

Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . Limited

Storage Temperature Range

Y, RC Packages . . . . . . . . . . . . . . . . . . . . –65

°C to +175°C

P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65

°C to +150°C

Operating Temperature Range

OP467A . . . . . . . . . . . . . . . . . . . . . . . . . . –55

°C to +125°C

OP467G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40

°C to +85°C

Junction Temperature Range

Y, RC Packages . . . . . . . . . . . . . . . . . . . . –65

°C to +175°C

P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300

°C

Package Type

Units

14-Lead Cerdip (Y)

°C/W

14-Lead Plastic DIP (P)

°C/W

16-Lead SOL (S)

°C/W

20-Contact LCC (RC)

°C/W

NOTES

1Absolute maximum ratings apply to both DICE and packaged parts, unless

otherwise noted.

2For supply voltages less than

±18 V, the absolute maximum input voltage is equal

to the supply voltage.

JA is specified for the worst case conditions, i.e., θJA is specified for device in socket

for cerdip, P-DIP, and LCC packages;

JA is specified for device soldered in circuit

board for SOIC package.

ORDERING GUIDE

Temperature

Package

Model

Ranges

Descriptions

Options

OP467AY/883

–55

°C to +125°C 14-Lead Cerdip

Q-14

OP467ARC/883 –55

°C to +125°C 20-Contact LCC

E-20A

OP467GP

–40

°C to +85°C 14-Lead Plastic DIP N-14

OP467GS

–40

°C to +85°C 16-Lead SOL

R-16

OP467GBC

+25

°C

DICE

DICE CHARACTERISTICS

OP467 Die Size 0.111

0.100 inch, 11,100 sq. mils Sub-

strate is Connected to V+, Number of Transistors 165.

( @ VS =

15.0 V, TA = +25 C unless otherwise noted.)

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