 |
Datenblatt-Suchmaschine für elektronische Bauteile |
|
|
Datenblatt-Suchmaschine für elektronische Bauteile |
|
SPRUG21 Datenblatt(PDF) 30 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
SPRUG21 Datenblatt(HTML) 30 Page - Texas Instruments |
|
|
30 / 214 page  TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com Table 2-5. Terminal Functions (continued) SIGNAL TYPE(1) IPD/IPU(2) SIGNAL DESCRIPTION NAME NO. GENERAL PURPOSE INPUT/OUTPUT (GPIO) GP00 T3 I/O/Z IPD GP01 U4 I/O/Z IPD GP02 V1 I/O/Z IPD GP03 U3 I/O/Z IPD General Purpose Input/Output GP04 T4 I/O/Z IPU GPIO[3:0] are mapped to BOOTMODE[3:0] (see Section 2.4.1, Boot Modes Supported) GP05 V2 I/O/Z IPD GPIO4 is mapped to LENDIAN GP06 V3 I/O/Z IPD 0 = Big Endian 1 = Little Endian (default) GP07 Y3 I/O/Z IPD GPIO5 is mapped to L2_CONFIG is a reserved bootstrap pin and should be GP08 Y4 I/O/Z IPD pulled up to DVDD18 during bootstrap GP09 AA2 I/O/Z IPD GPIO[7:6] are not multiplexed GP10 AA3 I/O/Z IPD GPIO[11:8] are mapped to DEVNUM[3:0] (see Section 2.4.1, Boot Modes Supported) GP11 AB4 I/O/Z IPD GPIO[15:12] are not multiplexed GP12 AB3 I/O/Z IPD GP13 AB2 I/O/Z IPD GP14 AA4 I/O/Z IPD GP15 AC3 I/O/Z IPD I2C SCL E4 I/O/Z I2C Clock (open drain) SDA D4 I/O/Z I2C Data (open drain) MULTICHANNEL BUFFERED SERIAL PORT (McBSP) CLKS0 D20 I IPD McBSP0 Module Clock CLKR0 B20 I/O/Z IPD McBSP0 Receive Clock CLKX0 C20 I/O/Z IPD McBSP0 Transmit Clock DR0 A20 I IPD McBSP0 Receive Data DX0 D19 O/Z IPD McBSP0 Transmit Data FSR0 B21 I/O/Z IPD McBSP0 Receive Frame Sync FSX0 A21 I/O/Z IPD McBSP0 Transmit Frame Sync CLKS1 A25 I IPD McBSP1 Module Clock CLKR1 A24 I/O/Z IPD McBSP1 Receive Clock CLKX1 C22 I/O/Z IPD McBSP1 Transmit Clock DR1 D21 I IPD McBSP1 Receive Data DX1 B22 O/Z IPD McBSP1 Transmit Data FSR1 C21 I/O/Z IPD McBSP1 Receive Frame Sync FSX1 A22 I/O/Z IPD McBSP1 Transmit Frame Sync MISCELLANEOUS VCNTL0 G3 O Voltage Control Outputs to variable core power supply (open-drain buffers) VCNTL1 G2 O Note: These pins must be externally pulled up. For more infomation, see the TMS320C6474 Hardware Design Guide application report (literature number VCNTL2 H4 O SPRAAW7). VCNTL3 H3 O SERIAL RAPIDIO (SRIO) RIORXN0 A9 I RIORXP0 A10 I Serial RapidIO Receive Data (2 links) RIORXN1 A13 I RIORXP1 A12 I 30 Device Overview Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) :TMS320C6474 |
|
Link URL |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Link zum Datenblatt | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
German ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
