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MPC860DP Datenblatt(PDF) 59 Page - Motorola, Inc

Teilenummer MPC860DP
Bauteilbeschribung  Family Hardware Specifications
PDF  76 Pages
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Hersteller  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MPC860DP Datenblatt(HTML) 59 Page - Motorola, Inc

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MOTOROLA
MPC860 Family Hardware Specifications
59
Ethernet Electrical Specifications
Figure 11-59. Ethernet Transmit Timing Diagram
Figure 11-60. CAM Interface Receive Start Timing Diagram
Figure 11-61. CAM Interface REJECT Timing Diagram
TCLK1
128
TxD1
(Output)
128
TENA(RTS1)
(Input)
NOTES:
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, then the
CSL bit is set in the buffer descriptor at the end of the frame transmission.
1.
2.
RENA(CD1)
(Input)
133
134
132
131
121
129
(NOTE 2)
RCLK1
RxD1
(Input)
RSTRT
(Output)
0
136
125
1
1
BIT1
BIT2
Start Frame
REJECT
137



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