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AD7621 Datenblatt(PDF) 23 Page - Analog Devices |
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AD7621 Datenblatt(HTML) 23 Page - Analog Devices |
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23 / 32 page ![]() AD7621 Rev. 0 | Page 23 of 32 BUSY SYNC SCLK SDOUT 12 3 14 15 16 D15 D14 D2 D1 D0 X RDC/SDIN = 0 INVSCLK = INVSYNC = 0 CNVST CS, RD EXT/INT = 0 t23 t22 t16 t15 t14 t29 t19 t21 t20 t18 t28 t30 t24 t25 t26 t27 t3 Figure 37. Master Serial Data Timing for Reading (Read After Convert) EXT/INT = 0 RDC/SDIN = 1 INVSCLK = INVSYNC = 0 D15 D14 D2 D1 D0 X 12 3 14 15 16 BUSY SYNC SCLK SDOUT CNVST CS, RD t23 t18 t15 t14 t17 t3 t22 t16 t1 t25 t26 t24 t27 t19 t20 t21 Figure 38. Master Serial Data Timing for Reading (Read Previous Conversion During Convert) |
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