USB3503 datasheet(37/82 Pages) SMSC

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USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications

Datasheet

SMSC USB3503A

Revision 1.1 (02-07-13)

DATASHEET

5.3.29

Default=0x32h - Corresponds to OCS_N/PRT_PWR pins & pausing to connect until write from I2C

5.3.30

Default = 0x00h

BIT NUMBER

BIT NAME

DESCRIPTION

7:6

Reserved

OcsPinSel

1= OCS device pin will assume role as an active low Over Current Sense input

0= OCS device pin disabled, register control established

PrtPwrPinSel

1=PRTPWR device pin will assume role as an active high Port Power Switch

Control output

0=PRTPWR device pin disabled, register control established

3:2

Reserved

connect_n

The SOC can utilize this bit to control when the hub attempts to connect to the

upstream host.

1 = Device will remain in Hub Mode.Connect Stage indefinitely until bit is cleared

by the SOC.

0 = Device will transition to the Hub Mode.Communication Stage after this bit is

asserted low by default or through a serial port write.

config_n

If the SOC intends to update the default configuration using the serial port, this

dependency between configuration and device operation can be minimized- the

SOC is only required to write to Serial Port Interlock Register within Thubconfig

and not all the registers it is attempting to configure.

Once all registers have been written for the desired configuration, the SOC must

clear this bit to ‘0’ for the device to resume normal operation using the new

configuration.

It may be desirable for the device to initiate autonomous operation with no SOC

intervention at all. This is why the default setting is to allow the device to initiate

automatic operation if the SOC does not intervene by writing the interlock

1 = Device will remain in Hub Mode.Configuration Stage indefinitely, and allow

SOC to write through the serial port to set any desired configuration.

0 = Device will transition out of Hub.Configuration Stage immediately after this

bit is asserted low through a serial port write. (A default low assertion results in

transition after a timeout.)

BIT NUMBER

BIT NAME

DESCRIPTION

Interrupt

Read:

1 = INT_N pin has been asserted low due to unmasked interrupt

0 = INT_N pin has not been asserted low due to unmasked interrupt

Write:

1 = No Effect – INT_N pin and register retains its current value

0 = Negate INT_N pin high

6:5

Reserved

USB3503 Datenblatt(PDF) 37 Page - SMSC Corporation

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