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USB3813 Datenblatt(PDF) 63 Page - SMSC Corporation

Teilenummer USB3813
Bauteilbeschribung  USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
PDF  68 Pages
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Hersteller  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

USB3813 Datenblatt(HTML) 63 Page - SMSC Corporation

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USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
SMSC USB3813
63
Revision 1.0 (06-17-13)
DATASHEET
9.5.2
Reset and Configuration Strap Timing
Figure 9.3 illustrates the RESET_N timing requirements and its relation to the configuration strap
signals. Assertion of RESET_N is not a requirement. However, if used, it must be asserted for the
minimum period specified.
Refer to Section 8.3, "Resets," on page 53 for additional information on resets. Refer to Section 6.3,
"Device Configuration Straps," on page 27 for additional information on configuration straps.
9.5.3
USB Timing
All device USB signals conform to the voltage, power, and timing characteristics/specifications as set
forth in the Universal Serial Bus Specification. Please refer to the Universal Serial Bus Specification,
Revision 2.0, available at http://www.usb.org.
9.5.4
HSIC Timing
All device HSIC signals conform to the voltage, power, and timing characteristics/specifications as set
forth in the High-Speed Inter-Chip USB Electrical Specification. Please refer to the High-Speed Inter-
Chip USB Electrical Specification, Version 1.0, available at http://www.usb.org.
9.5.5
SMBus Timing
All device SMBus signals conform to the voltage, power, and timing characteristics/specifications as
set forth in the System Management Bus Specification. Please refer to the System Management Bus
Specification, Version 1.0, available at http://smbus.org/specs.
9.5.6
I2C Timing
All device I2C signals conform to the 100KHz Standard Mode (Sm) voltage, power, and timing
characteristics/specifications as set forth in the I2C-Bus Specification. Please refer to the I2C-Bus
Specification, available at http://www.nxp.com.
Figure 9.3 RESET_N Configuration Strap Timing
Table 9.6 RESET_N Configuration Strap Timing
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
trstia
RESET_N input assertion time
5
us
tcsh
Configuration strap hold after RESET_N deassertion
1
ms
RESET_N
Configuration
Straps
trstia
tcsh



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