PCF8564AU datasheet(15/48 Pages) NXP

15 / 48 page

PCF8564A

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Product data sheet

Rev. 3 — 26 August 2013

15 of 48

NXP Semiconductors

PCF8564A

Real time clock and calendar

The generation of interrupts from the alarm function is controlled via bit AIE. If bit AIE is

enabled, the INT pin follows the condition of bit AF. AF will remain set until cleared by

command. Once AF has been cleared, it will only be set again when the time increments

to match the alarm condition once more. Alarm registers which have their AEN_x bit at

logic 1 are ignored.

8.7 Register CLKOUT_ctrl and clock output

A programmable square wave is available at pin CLKOUT. Operation is controlled by the

FE bit in register CLKOUT_ctrl at address 0Dh and the CLKOUT output enable pin

(CLKOE). To enable pin CLKOUT pin CLKOE must be set HIGH.

Frequencies of 32.768 kHz (default), 1.024 kHz, 32 Hz, and 1 Hz can be generated for

use as a system clock, microcontroller clock, input to a charge pump, or for calibration of

the oscillator.

(1) Only when all enabled alarm settings are matching.

It’s only on increment to a matched case that the alarm flag is set, see Section 8.6.5.

Fig 7.

Alarm function block diagram

PCF8564AU Datenblatt(PDF) 15 Page - NXP Semiconductors