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HEF4014BT653 Datenblatt(PDF) 6 Page - NXP Semiconductors

Teilenummer HEF4014BT653
Bauteilbeschribung  8-bit static shift register
PDF  14 Pages
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Hersteller  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
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HEF4014BT653 Datenblatt(HTML) 6 Page - NXP Semiconductors

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HEF4014B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 21 November 2011
6 of 14
NXP Semiconductors
HEF4014B
8-bit static shift register
11. Dynamic characteristics
[1]
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2]
tt is the same as tTHL and tTLH.
Table 7.
Dynamic characteristics
Tamb = 25 C; VSS = 0 V.
Symbol
Parameter
Conditions
VDD
Extrapolation formula[1]
Min
Typ
Max
Unit
tPHL
HIGH to LOW
propagation delay
CP to Qn;
see Figure 4
5 V
103 ns + (0.55 ns/pF)CL
-
130
260
ns
10 V
44 ns + (0.23 ns/pF)CL
-55
110
ns
15 V
32 ns + (0.16 ns/pF)CL
-40
80
ns
tPLH
LOW to HIGH
propagation delay
CP to Qn;
see Figure 4
5 V
88 ns + (0.55 ns/pF)CL
-
115
230
ns
10 V
39 ns + (0.23 ns/pF)CL
-
50
100
ns
15 V
32 ns + (0.16 ns/pF)CL
-40
80
ns
tt
transition time
Qn output;
see Figure 4
5 V
[2]
10 ns + (1.00 ns/pF)CL
-
60
120
ns
10 V
9 ns + (0.42 ns/pF)CL
-30
60
ns
15 V
6 ns + (0.28 ns/pF)CL
-20
40
ns
tW
pulse width
CP input;
minimum width;
see Figure 5
5 V
70
35
-
ns
10 V
30
15
-
ns
15 V
24
12
-
ns
tsu
set-up time
PE
 CP;
see Figure 5
5 V
40
10
-
ns
10 V
25
5
-
ns
15 V
15
0
-
ns
DS
 CP;
see Figure 5
5 V
+35
5-
ns
10 V
+25
5-
ns
15 V
25
0
-
ns
Dn
 CP;
see Figure 5
5 V
+35
5-
ns
10 V
+25
5-
ns
15 V
25
0
-
ns
th
hold time
PE
 CP;
see Figure 5
5 V
+25
5-
ns
10 V
20
0
-
ns
15 V
15
0
-
ns
DS
 CP;
see Figure 5
5 V
30
15
-
ns
10 V
20
10
-
ns
15 V
15
7
-
ns
Dn
 CP;
see Figure 5
5 V
30
15
-
ns
10 V
20
10
-
ns
15 V
15
7
-
ns
fclk(max)
maximum clock
frequency
see Figure 5
5 V
6
13
-
MHz
10 V
15
30
-
MHz
15 V
20
40
-
MHz



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