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AD1556ASRL Datenblatt(PDF) 16 Page - Analog Devices |
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AD1556ASRL Datenblatt(HTML) 16 Page - Analog Devices |
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16 / 24 page ![]() REV. B AD1555/AD1556 –16– CIRCUIT DESCRIPTION The AD1555/AD1556 chipset is a complete sigma-delta 24-bit A/D converter with very high dynamic range intended for the measurement of low frequency signals up to a few kHz such as those in seismic applications. The AD1555 contains an analog multiplexer, a fully differential programmable gain amplifier and a fourth order sigma-delta modulator. The analog multiplexer allows selection of one fully differential input from two different external inputs, an internal ground reference or an internal full-scale voltage reference. The fully differential programmable gain amplifier (PGA) has five gain settings of 1, 2.5, 8.5, 34, and 128, which allow the part to handle a total of five different input ranges: 1.6 V rms, 636 mV rms, 187 mV rms, 47 mV rms, and 12.4 mV rms that are programmed via digital input pins (CB0 to CB4). The modulator that operates nominally at a sampling frequency of 256 kHz, outputs a bit- stream whose ones-density is proportional to its input voltage. This bitstream can be filtered using the AD1556, which is a digital finite impulse low pass filter (FIR). The AD1556 outputs the data in a 24-bit word over a serial interface. The cutoff frequency and output rate of this filter can be programmed via an on-chip register or by hardware through digital input pins. The dynamic performance and the equivalent input noise vary with gain and output rate as shown in Table I. The use of the different PGA gain settings allows enhancement of the total system dynamic range up to 146 dB (gain of 34 or 128 and FO = 250 Hz). The AD1555 operates from a dual analog supply ( ±5 V), while the digital part of the AD1555 operates from a +5 V supply. The AD1556 operates from a single 3.3 V or 5 V supply. Each device exhibits low power dissipation and can be configured for standby mode. Figure 7 illustrates a typical operating circuit. MULTIPLEXER AND PROGRAMMABLE GAIN AMPLIFIER (PGA) Analog Inputs The AD1555 has two sets of fully differential inputs AIN and TIN. The common-mode rejection capability of these inputs generally surpasses the performance of conventional program- mable gain amplifiers. The very high input impedance, typically higher than 140 M Ω, allows direct connection of the sensor to the AD1555 inputs, even through serial resistances. Figure 7 illustrates such a configuration. The passive filter between the sensor and the AD1555 is shown here as an example. Other filter structures could be used, depending on the specific require- ments of the application. Also, the Johnson noise ( √4 k TRB) of the serial resistance should be taken into consideration. For instance, a 1 k Ω serial resistance reduces by approximately 1.3 dB the dynamic performance of a system using a gain setting of 128 at an output word rate FO = 500 Hz. For applications where the sensor inputs must be protected against severe AIN (+) AIN (–) TIN (–) AD1555 ADG609 DB DA AD780 O/P GND VOUT TEM P +VIN +5V 100nF 15 14 15 8 9 AC SINE TEST SOURCE 100nF 3 PGAOUT MODIN REFIN REFCAP1 AGND3 2 3 CLOCK SOURCE 1.024MHz CS R/ W TDATA SCLK RSEL DIN DOUT DRDY ERROR 17 16 18 13 30 19 15 14 20 SERIAL DATA INTERFACE ADSP-21xxx OR P AD1556 HARDWARE CONTROL 100nF 10 F +5V –5V 100nF 100nF 10 F T1 T2 C1 C2 TIN (+) R1 R2 R3 R4 C3 SENSOR: GEOPHONE, HYDROPHONE... CB0...CB4 MFLG MDATA MCLK VL DGND 7 5 15 17 18 2 28 25 23 22 22 F 6 48 100nF 25 31 10 TO OTHER AD1556s VDIG 100nF 11, 22, 44 12, 23, 24, 34 19 16 –VA +VA AGND2 AGND1 3, 26 4, 20, 21 127 MCLK MDATA MFLG CB0...CB4 8 TO OTHER AD1555s 5 6 UNUSED AD1555 PINS MUST BE LEFT UNCONNECTED; UNUSED AD1556 INPUT PINS MUST BE TIED TO DGND OR VL. 10 F +5V +5V –5V 15 32 SYNC RESET H/ S VL DGND DC TEST SOURCE 37 RESETD Figure 7. Typical Operating Circuit |
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