USB-TO-GPIO datasheet(11/50 Pages) TI1

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2.1

Introduction

2.2

Ribbon-Cable Connector J2 and Pinout

Chapter 2

SLLU093 – August 2006

Summary of Hardware Design

This chapter describes the major features of hardware design for the USB interface

adapter. See Chapter 6 for the schematic, bill of materials (BOM), and PCB layout

information.

The hardware is based on a USB peripheral chip from TI (TUSB3210). The TUSB3210 has an 8052 core

with enhanced performance. The PCB is a simple two-layer, top-side populated board (see the schematic

in Chapter 6). The major features of the hardware design are detailed the in the following sections.

This connector is used for communications and controls between the USB interface adapter and one more

multiple I2C slave device(s).

Table 2-1. Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

Used as either the 5th PMBUS CONTROL line (output) or as GPIO pin 7

PMBCTRL5/GPIO7

I/O

(input/output, with internal pullup enabled)

Used as either the 4th PMBUS CONTROL line (output) or as GPIO pin 6

PMBCTRL4/GPIO6

I/O

(input/output, with internal pullup enabled)

Used as either the 3rd PMBUS CONTROL line (output) or as GPIO pin 5

PMBCTRL3/GPIO5

I/O

(input/output, with internal pullup enabled)

Used as either the 2nd PMBUS CONTROL line (output) or as GPIO pin 4

PMBCTRL2/GPIO4

I/O

(input/output, with internal pullup enabled)

This pin can provide a 3.3-V output power supply at up to 100 mA. Any slave

+3.3V

PWR

device(s) can use this power supply as long as the total current consumption is less

than 100 mA.

Ground

GND

Common ground for the entire evaluation board

Used as either the 1st PMBUS CONTROL line (output) or as GPIO pin 3

PMBCTRL1/GPIO3

I/O

(input/output, with internal pullup enabled)

Used as either the ALERT line (input) for PMBUS or SMBUS communications, or as

PMBALERT/SMBALERT/GPIO2

I/O

GPIO pin 2 (input/output, with internal pullup disabled, and with an external

programmable pullup)

Used as either the CLOCK line (output) for PMBUS or SMBUS or I2C

PMBC/SMBC/SCL/GPIO1

I/O

communications, or as GPIO pin 1 (input/output, with internal pullup disabled, and

with an external programmable pullup)

Used as either the DATA line (input/output) for PMBUS or SMBUS or I2C

PMBD/SMBD/SDA/GPIO0

I/O

communications, or as GPIO pin 0 (input/output, with internal pullup disabled, and

with an external programmable pullup)

SLLU093 – August 2006

Summary of Hardware Design

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