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A8905CLB Datenblatt(PDF) 10 Page - Allegro MicroSystems

Teilenummer A8905CLB
Bauteilbeschribung  3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING
PDF  12 Pages
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Hersteller  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A8905CLB Datenblatt(HTML) 10 Page - Allegro MicroSystems

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8905
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
D0- Sleep/Run Mode; LOW = Sleep, HIGH = Run
This bit allows the device to be powered down when not in
use.
D1- Step Mode; LOW = Normal Operation, HIGH = Step Only
When in the step-only mode the back-EMF commutation
circuitry is disabled and the power outputs are commutated
by the start-up oscillator. This mode is intended for device
and system testing.
D2- Brake; LOW = Run, HIGH = Brake.
D3 and D4-These two bits set the output current limit:
D3
D4
Current Limit
0
0
Saturated
01
1 A
1
0
800 mA
1
1
600 mA
D5 thru D18-This 14-bit word (active low) programs the REF time
to set desired motor speed.
Bit Number
Count Number
D5
16
D6
32
D7
64
D8
128
D9
256
D10
512
D11
1 024
D12
2 048
D13
4 096
D14
8 192
D15
16 384
D16
32 768
D17
65 536
D18
131 072
SERIAL PORT BIT DEFINITIONS
D19-Speed-control mode switch;
LOW = internal once-around speed signal,
HIGH = external index data.
D20 and D21-These bits program the number of motor poles
for the once-around FCOM counter:
D20
D21
Motor Poles
00
8
01
–
10
16
11
12
D22 and D23-Control the multiplexer for DATA OUT:
D22
D23
Data Out
0
0
TACH (once around or index)
0
1
Thermal Shutdown
1
0
SYNC
1
1
FCOM



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