AD8557

Rev. C | Page 6 of 24

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

VSS

8

VOUT

7

VCLAMP

6

VPOS

5

VDD

1

DIGOUT

2

VNEG

4

AD8557

TOP VIEW

(Not to Scale)

Figure 2. 8-Lead SOIC_N Pin Configuration

12

11

10

9

NC

VCLAMP

NC

VOUT

1

NC

2

3

4

DIGIN

NC

DIGOUT

AD8557

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

NOTES

1. THE EXPOSED PAD SHOULD BE CONNECTED

TO AVSS (PIN 14) OR LEFT UNCONNECTED.

2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.

Figure 3. 16-Lead LFCSP_VQ Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

SOIC_N

LFCSP_VQ

1

VDD

Positive Supply Voltage.

2

2

DIGOUT

In read mode, this pin functions as a digital output.

3

4

DIGIN

Digital Input.

4

6

VNEG

Negative Amplifier Input (Inverting Input).

5

8

VPOS

Positive Amplifier Input (Noninverting Input).

6

10

VCLAMP

Set Clamp Voltage at Output.

7

12

VOUT

Amplifier Output.

8

VSS

Negative Supply Voltage.

13, 14

DVSS, AVSS

Negative Supply Voltage.

15, 16

DVDD, AVDD

Positive Supply Voltage.

1, 3, 5, 7, 9, 11

NC

Do Not Connect.

EPAD

EPAD

Exposed Pad. The exposed pad should be connected to AVSS (Pin 14) or left unconnected.