MP8352 – 3V to 6V INPUT, 6A, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER

MP8352 Rev. 1.0

www.MonolithicPower.com

6

1/25/2010

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2010 MPS. All Rights Reserved.

PIN FUNCTIONS

Pin #

Name

Description

1

FB

Feedback. An external resistor divider from the output to GND, tapped to the FB pin

sets the output voltage. To prevent current limit run away during a short circuit fault

condition the frequency foldback comparator lowers the oscillator frequency when the

FB voltage is below 250mV.

2

PG

output of this pin is low if the output voltage is 10% less than the nominal voltage,

otherwise it is an open drain.

3

EN/SYNC

On/Off Control and External Frequency Synchronization Input.

4, 5, 6

IN

Supply Voltage. The MP8352 operates from a +3V to +6V unregulated input. C1 is

needed to prevent large voltage spikes from appearing at the input.

7

N/C

No Connect.

8, 9, 10

SW

Switch Output.

11

BST

Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply

voltage. It is connected between SW and BST pins to form a floating supply across the

power switch driver.

12

VCC

Need external Bias Power Supply. Decouple with a 1µF ceramic capacitor.

13

BG

Gate Driver Output. Connect this pin to the synchronous MOSFET Gate.

14

GND,

Exposed Pad

Ground. This pin is the voltage reference for the regulated output voltage. For this

reason care must be taken in its layout. This node should be placed outside of the M2

to C1 ground path to prevent switching current spikes from inducing voltage noise into

the part. Connect exposed pad to GND plane for optimal thermal performance.