NB669, 24V, HIGH CURRENT SYNCHRONOUS BUCK CONVERTER WITH LDO

NB669 Rev. 1.01

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12

7/23/2013

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chip. Once ENLDO is off, all the regulators

include Vcc will be off. ENLDO is internally pulled

high so it can be floated in the normal operation.

When ENLDO is pulled high, Pull En high to turn

on the Buck regulator also the charge pump clk,

and pull EN low to turn them off. Do not float the

EN pin.

See Table1 for the logics to control the regulators

Table 1—ENLDO/EN Control

State

ENLDO

EN

VCC VOUT/CLK

LDO

S0

1

1

ON

ON

ON

S3

1

0

ON

OFF

ON

S4/S5

0

0

OFF

OFF

OFF

Others

0

1

OFF

OFF

OFF

For automatic start-up the EN pin can be pulled

up to input voltage through a resistive voltage

divider. Choose the values of the pull-up resistor

determine the automatic start-up voltage:

−

+

DOWN

IN START

DOWN

RR

V1.35

(V)

R

(3)

the

−

IN START

V

is set at 5.32V.

To avoid noise, a 10nF ceramic capacitor from

EN to GND is recommended.

There is an internal Zener diode on the EN pin,

which clamps the EN pin voltage to prevent it

from running away. The maximum pull up current

assuming a worst case 12V internal Zener clamp

should be less than 1mA.

Therefore, when EN is driven by an external logic

signal, the EN voltage should be lower than 12V;

when EN is connected with VIN through a pull-up

resistor or a resistive voltage divider, the

resistance selection should ensure the maximum

pull up current less than 1mA.

If using a resistive voltage divider and VIN higher

than 12V, the allowed minimum pull-up resistor

IN

UP

DOWN

V(V) 12

12

1(mA)

R(k )

R

(k )

−

−<

ΩΩ

(4)

pull-down

resistor

is

not

connected),

the

IN-START

V

is determined by input UVLO, and the

minimum resistor value is:

IN

UP

V(V) 12

R(k )

1(mA)

−

Ω>

(5)

A typical pull-up resistor is 499kΩ.

Soft Start

The NB669 employs soft start (SS) mechanism

to ensure smooth output during power-up. When

the EN pin becomes high, the internal reference

voltage ramps up gradually; hence, the output

voltage ramps up smoothly, as well. Once the

reference voltage reaches the target value, the

soft start finishes and it enters into steady state

operation.

If the output is pre-biased to a certain voltage

during startup, the IC will disable the switching of

both high-side and low-side switches until the

voltage on the internal reference exceeds the

sensed output voltage at the internal FB node.

5V Linear Regulator

There is a built-in 100-mA standby linear

regulator which outputs 5V.The 5V LDO is

intended mainly for auxiliary 5V supply for the

notebook system during standby mode.

Add a ceramic capacitor with a value between

4.7μF and 22μF placed close to the LDO pins to

stabilize LDOs.

5V LDO Switch Over

When the output voltage becomes higher than

4.77V and the power good flag is generated,

internal 5V LDO regulator is shut off and the LDO

output is connected to Vout pin by the internal

switch over MOSFET. The 20-us power good

deglitch time helps a switch over without glitch.

CLK for Charge Pump

The 300kHz CLK signal can be used to drive an

external charge pump circuit to generate

approximately 12-15V DC voltage. The CLK

voltage becomes available once the VIN is higher

than UVLO threshold. Example of charge pump

control circuit is shown in Figure 7.