AM79C975VCW datasheet(190/304 Pages) AMD

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190

Am79C973/Am79C975

P R E L I M INARY

15-10 RES

Reserved locations. Written as

zeros and read as undefined.

9-8

D4_SCALE

These bits correspond to the

DATA_SCALE field of the PMC-

SR (offset register 44 of the PCI

configuration space, bits 14-13).

Refer

the

description

DATA_SCALE for the meaning of

this field.

Read

accessible

always.

D4_SCALE is read only. Cleared

by H_RESET and is not affected

by S_RESET or setting the STOP

bit

7-0

DATA4

These bits correspond to the PCI

DATA register (offset Register 47

of the PCI configuration space,

bits 7-0). Refer to the description

of DATA register for the meaning

of this field.

Read accessible always. DATA4

read

only.

Cleared

H_RESET and is not affected by

S_RESET or setting the STOP

bit.

BCR42: PCI DATA Register Five (DATA5) Alias

Note: This register is an alias of the DATA register and

also of the DATA_SCALE field of the PCMCR register.

Since these two are read only, BCR42 provides a

means of programming them through the EEPROM.

The contents of this register are copied into the corre-

sponding fields pointed with the DATA_SEL field set to

five. Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

15-10 RES

Reserved locations. Written as

zeros and read as undefined.

9-8

D5_SCALE

These bits correspond to the

DATA_SCALE field of the PMC-

SR (offset Register 44 of the PCI

configuration space, bits 14-13).

Refer

the

description

DATA_SCALE for the meaning of

this field.

Read

accessible

always.

D5_SCALE is read only. Cleared

by H_RESET and is not affected

by S_RESET or setting the STOP

bit

7-0

DATA5

These bits correspond to the PCI

DATA register (offset Register 47

of the PCI configuration space,

bits 7-0). Refer to the description

of DATA register for the meaning

of this field.

Read accessible always. DATA5

read

only.

Cleared

H_RESET and is not affected by

S_RESET or setting the STOP

bit.

BCR43: PCI DATA Register Six (DATA6) Alias

Note: This register is an alias of the DATA register and

also of the DATA_SCALE field of the PCMCR register.

Since these two are read only, BCR43 provides a

means of programming them through the EEPROM.

The contents of this register are copied into the corre-

sponding fields pointed with the DATA_SEL field set to

six. Bits 15-0 in this register are programmable through

the EEPROM.

Bit

Name

Description

15-10 RES

Reserved locations. Written as

zeros and read as undefined.

9-8

D6_SCALE

These bits correspond to the

DATA_SCALE field of the PMC-

SR (offset Register 44 of the PCI

configuration space, bits 14-13).

Refer

the

description

DATA_SCALE for the meaning of

this field.

Read

accessible

always.

D6_SCALE is read only. Cleared

by H_RESET and is not affected

by S_RESET or setting the STOP

bit

7-0

DATA6

These bits correspond to the PCI

DATA register (offset Register 47

of the PCI configuration space,

bits 7-0). Refer to the description

of DATA register for the meaning

of this field.

Read accessible always. DATA6

read

only.

Cleared

H_RESET and is not affected by

S_RESET or setting the STOP

bit.

AM79C975VCW Datenblatt(PDF) 190 Page - Advanced Micro Devices

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