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AM79C975VCW Datenblatt(PDF) 201 Page - Advanced Micro Devices |
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AM79C975VCW Datenblatt(HTML) 201 Page - Advanced Micro Devices |
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201 / 304 page ![]() Am79C973/Am79C975 201 P R E L I M INARY Table 50. ANR17: PHY Control/Status Register (Register 17) Reg Bits Name Description Read/Write H/W Reset Soft Reset 17 15 SDISALIGN (100M) 1 = pass unaligned data to internal PHY 0 = enable alignment block R/W 0 Retains Previous Value 17 14 SDISSCR (100M) 1 = disable scrambler/descrambler 0 = enable scrambler/descrambler R/W 0 Retains Previous Value 17 13 Force Link Good Enable 1 = link status forced to link up state. 0 = link status is determined by the device. R/W 0 0 17 12 Disable Link Pulse (10M) 1 = Link pulses sent from the 10BASE-T transmitter are suppressed. R/W 0 0 17 11 SQE_TEST Disable (10M) 1 = Disables the SQE heartbeat which occurs after each 10BASE-T transmission. 0 = The heart beat assertion occurs on the COL pin approximately 1 µs after transmission and for a duration of 1 µs. R/W 0 0 17 10 EN_FEFI (100M) 1 = enable FEFI, 0 = disable FEFI This bit is ignored if auto-neg is enabled. R/W 0 0 17 9 Jabber Detect Disable (10M) 1 = disable jabber detect 0 = enable jabber detect R/W 0 0 17 8:7 LBK[1-0] (100M) 00 = normal operation 01 = unused 10 = unused 11 = serial loopback R/W 00 00 17 6 Receive Polarity Reversed (10M) 1 = Receive polarity of the 10BASE-T receiver is reversed. 0 = Receive polarity is correct. RO 0 0 17 5 Auto Receive Polarity Correction Disable (10M) 1 = polarity correction circuit is disabled for 10BASE-T. 0 = Self correcting polarity circuit is enabled R/W 0 0 17 4 Extended Distance Enable (10M) 1 = 10BASE-T receive squelch thresholds are reduced to allow reception of frames which are greater than 100 meters. 0 = Squelch thresholds are set for standard distance of 100 meters. R/W 0 0 17 3 TX_DISABLE 1 = TX± outputs not active for MLT-3 and 10BASE-T. TX± outputs to logical “0” for PECL. 0 = Transmit valid data. R/W 0 0 17 2 TX_CRS 1 = CRS is asserted when transmit or receive medium is active. 0 = CRS is asserted when receive medium is active. RO 1 1 17 1 Reserved Reserved. RO 0 0 17 0 PHY Isolated 1 = Internal PHY is isolated 0 = Internal PHY is enabled RO 0/1 0/1 |
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